From owner-svn-src-all@FreeBSD.ORG Fri May 25 20:43:39 2012 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 5F696106564A; Fri, 25 May 2012 20:43:39 +0000 (UTC) (envelope-from raj@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 49ADF8FC08; Fri, 25 May 2012 20:43:39 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q4PKhd10032253; Fri, 25 May 2012 20:43:39 GMT (envelope-from raj@svn.freebsd.org) Received: (from raj@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q4PKhdpQ032250; Fri, 25 May 2012 20:43:39 GMT (envelope-from raj@svn.freebsd.org) Message-Id: <201205252043.q4PKhdpQ032250@svn.freebsd.org> From: Rafal Jaworowski Date: Fri, 25 May 2012 20:43:39 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r236024 - head/sys/boot/fdt/dts X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 25 May 2012 20:43:39 -0000 Author: raj Date: Fri May 25 20:43:38 2012 New Revision: 236024 URL: http://svn.freebsd.org/changeset/base/236024 Log: Import DTS files for the upcoming DPAA QorIQ (PowerPC) support. - P2041RDB - P3041DS - P5020DS Obtained from: Freescale Added: head/sys/boot/fdt/dts/p2041rdb.dts (contents, props changed) head/sys/boot/fdt/dts/p2041si.dtsi (contents, props changed) head/sys/boot/fdt/dts/p3041si.dtsi (contents, props changed) head/sys/boot/fdt/dts/p5020ds.dts (contents, props changed) head/sys/boot/fdt/dts/p5020si.dtsi (contents, props changed) Modified: head/sys/boot/fdt/dts/p3041ds.dts Added: head/sys/boot/fdt/dts/p2041rdb.dts ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/boot/fdt/dts/p2041rdb.dts Fri May 25 20:43:38 2012 (r236024) @@ -0,0 +1,490 @@ +/* + * P2041RDB Device Tree Source + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* $FreeBSD$ */ + +/include/ "p2041si.dtsi" + +/ { + model = "fsl,P2041RDB"; + compatible = "fsl,P2041RDB"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + aliases { + phy_rgmii_0 = &phy_rgmii_0; + phy_rgmii_1 = &phy_rgmii_1; + phy_sgmii_2 = &phy_sgmii_2; + phy_sgmii_3 = &phy_sgmii_3; + phy_sgmii_4 = &phy_sgmii_4; + phy_sgmii_1c = &phy_sgmii_1c; + phy_sgmii_1d = &phy_sgmii_1d; + phy_sgmii_1e = &phy_sgmii_1e; + phy_sgmii_1f = &phy_sgmii_1f; + phy_xgmii_2 = &phy_xgmii_2; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000 0x80000000>; + }; + + dcsr: dcsr@f00000000 { + ranges = <0x00000000 0xf 0x00000000 0x01008000>; + }; + + bman-portals@ff4000000 { + bman-portal@0 { + cpu-handle = <&cpu0>; + }; + bman-portal@4000 { + cpu-handle = <&cpu1>; + }; + bman-portal@8000 { + cpu-handle = <&cpu2>; + }; + bman-portal@c000 { + cpu-handle = <&cpu3>; + }; + bman-portal@10000 { + }; + bman-portal@14000 { + }; + bman-portal@18000 { + }; + bman-portal@1c000 { + }; + bman-portal@20000 { + }; + bman-portal@24000 { + }; + + buffer-pool@0 { + compatible = "fsl,p2041-bpool", "fsl,bpool"; + fsl,bpid = <0>; + fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; + }; + }; + + qman-portals@ff4200000 { + qportal0: qman-portal@0 { + cpu-handle = <&cpu0>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal1: qman-portal@4000 { + cpu-handle = <&cpu1>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal2: qman-portal@8000 { + cpu-handle = <&cpu2>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal3: qman-portal@c000 { + cpu-handle = <&cpu3>; + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal4: qman-portal@10000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal5: qman-portal@14000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal6: qman-portal@18000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal7: qman-portal@1c000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal8: qman-portal@20000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + + qportal9: qman-portal@24000 { + fsl,qman-pool-channels = <&qpool1 &qpool2 &qpool3 + &qpool4 &qpool5 &qpool6 + &qpool7 &qpool8 &qpool9 + &qpool10 &qpool11 &qpool12 + &qpool13 &qpool14 &qpool15>; + }; + }; + + soc: soc@ffe000000 { + spi@110000 { + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25sl12801"; + reg = <0>; + spi-max-frequency = <40000000>; /* input clock */ + partition@u-boot { + label = "u-boot"; + reg = <0x00000000 0x00100000>; + read-only; + }; + partition@kernel { + label = "kernel"; + reg = <0x00100000 0x00500000>; + read-only; + }; + partition@dtb { + label = "dtb"; + reg = <0x00600000 0x00100000>; + read-only; + }; + partition@fs { + label = "file system"; + reg = <0x00700000 0x00900000>; + }; + }; + }; + + i2c@118000 { + lm75b@48 { + compatible = "nxp,lm75a"; + reg = <0x48>; + }; + eeprom@50 { + compatible = "at24,24c256"; + reg = <0x50>; + }; + rtc@68 { + compatible = "pericom,pt7c4338"; + reg = <0x68>; + }; + }; + + i2c@118100 { + eeprom@50 { + compatible = "at24,24c256"; + reg = <0x50>; + }; + }; + + usb1: usb@211000 { + dr_mode = "host"; + }; + + pme: pme@316000 { + /* Commented out, use default allocation */ + /* fsl,pme-pdsr = <0x0 0x23000000 0x0 0x01000000>; */ + /* fsl,pme-sre = <0x0 0x24000000 0x0 0x00a00000>; */ + }; + + qman: qman@318000 { + /* Commented out, use default allocation */ + /* fsl,qman-fqd = <0x0 0x20000000 0x0 0x01000000>; */ + /* fsl,qman-pfdr = <0x0 0x21000000 0x0 0x01000000>; */ + }; + + bman: bman@31a000 { + /* Same as fsl,qman-*, use default allocation */ + /* fsl,bman-fbpr = <0x0 0x22000000 0x0 0x01000000>; */ + }; + + fman0: fman@400000 { + enet0: ethernet@e0000 { + tbi-handle = <&tbi0>; + phy-handle = <&phy_sgmii_2>; + phy-connection-type = "sgmii"; + }; + + mdio0: mdio@e1120 { + tbi0: tbi-phy@8 { + reg = <0x8>; + device_type = "tbi-phy"; + }; + + phy_rgmii_0: ethernet-phy@0 { + reg = <0x0>; + }; + phy_rgmii_1: ethernet-phy@1 { + reg = <0x1>; + }; + phy_sgmii_2: ethernet-phy@2 { + reg = <0x2>; + }; + phy_sgmii_3: ethernet-phy@3 { + reg = <0x3>; + }; + phy_sgmii_4: ethernet-phy@4 { + reg = <0x4>; + }; + phy_sgmii_1c: ethernet-phy@1c { + reg = <0x1c>; + }; + phy_sgmii_1d: ethernet-phy@1d { + reg = <0x1d>; + }; + phy_sgmii_1e: ethernet-phy@1e { + reg = <0x1e>; + }; + phy_sgmii_1f: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + + enet1: ethernet@e2000 { + tbi-handle = <&tbi1>; + phy-handle = <&phy_sgmii_3>; + phy-connection-type = "sgmii"; + }; + + mdio@e3120 { + tbi1: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet2: ethernet@e4000 { + tbi-handle = <&tbi2>; + phy-handle = <&phy_sgmii_4>; + phy-connection-type = "sgmii"; + }; + + mdio@e5120 { + tbi2: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet3: ethernet@e6000 { + tbi-handle = <&tbi3>; + phy-handle = <&phy_rgmii_1>; + phy-connection-type = "rgmii"; + }; + + mdio@e7120 { + tbi3: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet4: ethernet@e8000 { + tbi-handle = <&tbi4>; + phy-handle = <&phy_rgmii_0>; + phy-connection-type = "rgmii"; + }; + + mdio@e9120 { + tbi4: tbi-phy@8 { + reg = <8>; + device_type = "tbi-phy"; + }; + }; + + enet5: ethernet@f0000 { + /* + * phy-handle will be updated by U-Boot to + * reflect the actual slot the XAUI card is in. + */ + phy-handle = <&phy_xgmii_2>; + phy-connection-type = "xgmii"; + }; + + mdio@f1000 { + /* XAUI card in slot 2 */ + phy_xgmii_2: ethernet-phy@0 { + reg = <0x0>; + }; + }; + }; + }; + + rapidio@ffe0c0000 { + reg = <0xf 0xfe0c0000 0 0x11000>; + + port1 { + ranges = <0 0 0xc 0x20000000 0 0x10000000>; + }; + port2 { + ranges = <0 0 0xc 0x30000000 0 0x10000000>; + }; + }; + + localbus@ffe124000 { + reg = <0xf 0xfe124000 0 0x1000>; + ranges = <0 0 0xf 0xb8000000 0x04000000>; + + flash@0,0 { + compatible = "cfi-flash"; + /* + * Map 64Mb of 128MB NOR flash memory. Since highest + * line of address of NOR flash memory are set by + * FPGA, memory are divided into two pages equal to + * 64MB. One of the pages can be accessed at once. + */ + reg = <0 0 0x04000000>; + bank-width = <2>; + device-width = <2>; + }; + }; + + pci0: pcie@ffe200000 { + reg = <0xf 0xfe200000 0 0x1000>; + ranges = <0x02000000 0 0x80000000 0x0 0x80000000 0x0 0x10000000 + 0x01000000 0 0x00000000 0x0 0xff000000 0x0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0x80000000 + 0x02000000 0 0x80000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff000000 + 0 0x00010000>; + }; + }; + + pci1: pcie@ffe201000 { + reg = <0xf 0xfe201000 0 0x1000>; + ranges = <0x02000000 0x0 0x90000000 0x0 0x90000000 0x0 0x10000000 + 0x01000000 0x0 0x00000000 0x0 0xff010000 0x0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0x90000000 + 0x02000000 0 0x90000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff010000 + 0 0x00010000>; + }; + }; + + pci2: pcie@ffe202000 { + reg = <0xf 0xfe202000 0 0x1000>; + ranges = <0x02000000 0 0xa0000000 0x0 0xa0000000 0 0x10000000 + 0x01000000 0 0x00000000 0x0 0xff020000 0 0x00010000>; + pcie@0 { + ranges = <0x02000000 0 0xa0000000 + 0x02000000 0 0xa0000000 + 0 0x10000000 + + 0x01000000 0 0x00000000 + 0x01000000 0 0xff020000 + 0 0x00010000>; + }; + }; + + fsl,dpaa { + compatible = "fsl,p2041-dpaa", "fsl,dpaa"; + + ethernet@0 { + compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,qman-channel = <&qpool1>; + fsl,fman-mac = <&enet0>; + status = "okay"; + }; + ethernet@1 { + compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,qman-channel = <&qpool1>; + fsl,fman-mac = <&enet1>; + status = "okay"; + }; + ethernet@2 { + compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,qman-channel = <&qpool1>; + fsl,fman-mac = <&enet2>; + status = "okay"; + }; + ethernet@3 { + compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,qman-channel = <&qpool1>; + fsl,fman-mac = <&enet3>; + status = "okay"; + }; + ethernet@4 { + compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,qman-channel = <&qpool1>; + fsl,fman-mac = <&enet4>; + status = "okay"; + }; + ethernet@5 { + compatible = "fsl,p2041-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,qman-channel = <&qpool1>; + fsl,fman-mac = <&enet5>; + status = "okay"; + }; + }; + + chosen { + stdin = "serial0"; + stdout = "serial0"; + }; +}; Added: head/sys/boot/fdt/dts/p2041si.dtsi ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/boot/fdt/dts/p2041si.dtsi Fri May 25 20:43:38 2012 (r236024) @@ -0,0 +1,1296 @@ +/* + * P2041 Silicon Device Tree Source + * + * Copyright 2011 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* $FreeBSD$ */ + +/dts-v1/; + +/ { + compatible = "fsl,P2041"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&mpic>; + + aliases { + ccsr = &soc; + dcsr = &dcsr; + + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + ethernet3 = &enet3; + ethernet4 = &enet4; + ethernet5 = &enet5; + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; + usb0 = &usb0; + usb1 = &usb1; + dma0 = &dma0; + dma1 = &dma1; + bman = &bman; + qman = &qman; + pme = &pme; + rman = &rman; + sdhc = &sdhc; + msi0 = &msi0; + msi1 = &msi1; + msi2 = &msi2; + + crypto = &crypto; + sec_jr0 = &sec_jr0; + sec_jr1 = &sec_jr1; + sec_jr2 = &sec_jr2; + sec_jr3 = &sec_jr3; + rtic_a = &rtic_a; + rtic_b = &rtic_b; + rtic_c = &rtic_c; + rtic_d = &rtic_d; + sec_mon = &sec_mon; + + fman0 = &fman0; + fman0_oh0 = &fman0_oh0; + fman0_oh1 = &fman0_oh1; + fman0_oh2 = &fman0_oh2; + fman0_oh3 = &fman0_oh3; + fman0_oh4 = &fman0_oh4; + fman0_oh5 = &fman0_oh5; + fman0_oh6 = &fman0_oh6; + fman0_rx0 = &fman0_rx0; + fman0_rx1 = &fman0_rx1; + fman0_rx2 = &fman0_rx2; + fman0_rx3 = &fman0_rx3; + fman0_rx4 = &fman0_rx4; + fman0_rx5 = &fman0_rx5; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: PowerPC,e500mc@0 { + device_type = "cpu"; + reg = <0>; + bus-frequency = <749999996>; + next-level-cache = <&L2_0>; + L2_0: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu1: PowerPC,e500mc@1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2_1>; + L2_1: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu2: PowerPC,e500mc@2 { + device_type = "cpu"; + reg = <2>; + next-level-cache = <&L2_2>; + L2_2: l2-cache { + next-level-cache = <&cpc>; + }; + }; + cpu3: PowerPC,e500mc@3 { + device_type = "cpu"; + reg = <3>; + next-level-cache = <&L2_3>; + L2_3: l2-cache { + next-level-cache = <&cpc>; + }; + }; + }; + + dcsr: dcsr@f00000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,dcsr", "simple-bus"; + + dcsr-epu@0 { + compatible = "fsl,dcsr-epu"; + interrupts = <52 2 0 0 + 84 2 0 0 + 85 2 0 0>; + interrupt-parent = <&mpic>; + reg = <0x0 0x1000>; + }; + dcsr-npc { + compatible = "fsl,dcsr-npc"; + reg = <0x1000 0x1000 0x1000000 0x8000>; + }; + dcsr-nxc@2000 { + compatible = "fsl,dcsr-nxc"; + reg = <0x2000 0x1000>; + }; + dcsr-corenet { + compatible = "fsl,dcsr-corenet"; + reg = <0x8000 0x1000 0xB0000 0x1000>; + }; + dcsr-dpaa@9000 { + compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa"; + reg = <0x9000 0x1000>; + }; + dcsr-ocn@11000 { + compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn"; + reg = <0x11000 0x1000>; + }; + dcsr-ddr@12000 { + compatible = "fsl,dcsr-ddr"; + dev-handle = <&ddr>; + reg = <0x12000 0x1000>; + }; + dcsr-nal@18000 { + compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal"; + reg = <0x18000 0x1000>; + }; + dcsr-rcpm@22000 { + compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm"; + reg = <0x22000 0x1000>; + }; + dcsr-cpu-sb-proxy@40000 { + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu0>; + reg = <0x40000 0x1000>; + }; + dcsr-cpu-sb-proxy@41000 { + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu1>; + reg = <0x41000 0x1000>; + }; + dcsr-cpu-sb-proxy@42000 { + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu2>; + reg = <0x42000 0x1000>; + }; + dcsr-cpu-sb-proxy@43000 { + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; + cpu-handle = <&cpu3>; + reg = <0x43000 0x1000>; + }; + }; + + bman-portals@ff4000000 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "bman-portals"; + ranges = <0x0 0xf 0xfde00000 0x200000>; + bman-portal@0 { + cell-index = <0x0>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x0 0x4000 0x100000 0x1000>; + interrupts = <105 2 0 0>; + }; + bman-portal@4000 { + cell-index = <0x1>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x4000 0x4000 0x101000 0x1000>; + interrupts = <107 2 0 0>; + }; + bman-portal@8000 { + cell-index = <2>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x8000 0x4000 0x102000 0x1000>; + interrupts = <109 2 0 0>; + }; + bman-portal@c000 { + cell-index = <0x3>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0xc000 0x4000 0x103000 0x1000>; + interrupts = <111 2 0 0>; + }; + bman-portal@10000 { + cell-index = <0x4>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x10000 0x4000 0x104000 0x1000>; + interrupts = <113 2 0 0>; + }; + bman-portal@14000 { + cell-index = <0x5>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x14000 0x4000 0x105000 0x1000>; + interrupts = <115 2 0 0>; + }; + bman-portal@18000 { + cell-index = <0x6>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x18000 0x4000 0x106000 0x1000>; + interrupts = <117 2 0 0>; + }; + bman-portal@1c000 { + cell-index = <0x7>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x1c000 0x4000 0x107000 0x1000>; + interrupts = <119 2 0 0>; + }; + bman-portal@20000 { + cell-index = <0x8>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x20000 0x4000 0x108000 0x1000>; + interrupts = <121 2 0 0>; + }; + bman-portal@24000 { + cell-index = <0x9>; + compatible = "fsl,p2041-bman-portal", "fsl,bman-portal"; + reg = <0x24000 0x4000 0x109000 0x1000>; + interrupts = <123 2 0 0>; + }; + + buffer-pool@0 { + compatible = "fsl,p2041-bpool", "fsl,bpool"; + fsl,bpid = <0>; + fsl,bpool-cfg = <0 0x100 0 1 0 0x100>; + }; + }; + + qman-portals@ff4200000 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "qman-portals"; + ranges = <0x0 0xf 0xfdc00000 0x200000>; + qportal0: qman-portal@0 { + cell-index = <0x0>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x0 0x4000 0x100000 0x1000>; + interrupts = <104 0x2 0 0>; + fsl,qman-channel-id = <0x0>; + }; + + qportal1: qman-portal@4000 { + cell-index = <0x1>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x4000 0x4000 0x101000 0x1000>; + interrupts = <106 0x2 0 0>; + fsl,qman-channel-id = <0x1>; + }; + + qportal2: qman-portal@8000 { + cell-index = <0x2>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x8000 0x4000 0x102000 0x1000>; + interrupts = <108 0x2 0 0>; + fsl,qman-channel-id = <0x2>; + }; + + qportal3: qman-portal@c000 { + cell-index = <0x3>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0xc000 0x4000 0x103000 0x1000>; + interrupts = <110 0x2 0 0>; + fsl,qman-channel-id = <0x3>; + }; + + qportal4: qman-portal@10000 { + cell-index = <0x4>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x10000 0x4000 0x104000 0x1000>; + interrupts = <112 0x2 0 0>; + fsl,qman-channel-id = <0x4>; + }; + + qportal5: qman-portal@14000 { + cell-index = <0x5>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x14000 0x4000 0x105000 0x1000>; + interrupts = <114 0x2 0 0>; + fsl,qman-channel-id = <0x5>; + }; + + qportal6: qman-portal@18000 { + cell-index = <0x6>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x18000 0x4000 0x106000 0x1000>; + interrupts = <116 0x2 0 0>; + fsl,qman-channel-id = <0x6>; + }; + + qportal7: qman-portal@1c000 { + cell-index = <0x7>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x1c000 0x4000 0x107000 0x1000>; + interrupts = <118 0x2 0 0>; + fsl,qman-channel-id = <0x7>; + }; + + qportal8: qman-portal@20000 { + cell-index = <0x8>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x20000 0x4000 0x108000 0x1000>; + interrupts = <120 0x2 0 0>; + fsl,qman-channel-id = <0x8>; + }; + + qportal9: qman-portal@24000 { + cell-index = <0x9>; + compatible = "fsl,p2041-qman-portal", "fsl,qman-portal"; + reg = <0x24000 0x4000 0x109000 0x1000>; + interrupts = <122 0x2 0 0>; + fsl,qman-channel-id = <0x9>; + }; + + qpool1: qman-pool@1 { + cell-index = <1>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x21>; + }; + + qpool2: qman-pool@2 { + cell-index = <2>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x22>; + }; + + qpool3: qman-pool@3 { + cell-index = <3>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x23>; + }; + + qpool4: qman-pool@4 { + cell-index = <4>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x24>; + }; + + qpool5: qman-pool@5 { + cell-index = <5>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x25>; + }; + + qpool6: qman-pool@6 { + cell-index = <6>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x26>; + }; + + qpool7: qman-pool@7 { + cell-index = <7>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x27>; + }; + + qpool8: qman-pool@8 { + cell-index = <8>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x28>; + }; + + qpool9: qman-pool@9 { + cell-index = <9>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x29>; + }; + + qpool10: qman-pool@10 { + cell-index = <10>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2a>; + }; + + qpool11: qman-pool@11 { + cell-index = <11>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2b>; + }; + + qpool12: qman-pool@12 { + cell-index = <12>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2c>; + }; + + qpool13: qman-pool@13 { + cell-index = <13>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2d>; + }; + + qpool14: qman-pool@14 { + cell-index = <14>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2e>; + }; + + qpool15: qman-pool@15 { + cell-index = <15>; + compatible = "fsl,p2041-qman-pool-channel", "fsl,qman-pool-channel"; + fsl,qman-channel-id = <0x2f>; + }; + }; + + soc: soc@ffe000000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + compatible = "simple-bus"; + + bus-frequency = <0>; // Filled out by kernel. + + ranges = <0x00000000 0xf 0xfe000000 0x1000000>; + reg = <0xf 0xfe000000 0 0x00001000>; + + soc-sram-error { + compatible = "fsl,soc-sram-error"; + interrupts = <16 2 1 29>; + }; + + corenet-law@0 { + compatible = "fsl,corenet-law"; + reg = <0x0 0x1000>; + fsl,num-laws = <32>; + }; + + ddr: memory-controller@8000 { + compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; + reg = <0x8000 0x1000>; + interrupts = <16 2 1 23>; + }; + + cpc: l3-cache-controller@10000 { + compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache"; + reg = <0x10000 0x1000>; + interrupts = <16 2 1 27>; + }; + + corenet-cf@18000 { + compatible = "fsl,corenet-cf"; + reg = <0x18000 0x1000>; + interrupts = <16 2 1 31>; + fsl,ccf-num-csdids = <32>; + fsl,ccf-num-snoopids = <32>; + }; + + iommu@20000 { + compatible = "fsl,pamu-v1.0", "fsl,pamu"; + reg = <0x20000 0x4000>; + interrupts = < + 24 2 0 0 + 16 2 1 30>; *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***