From owner-freebsd-current@FreeBSD.ORG Thu Apr 7 17:12:44 2011 Return-Path: Delivered-To: freebsd-current@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 62038106564A for ; Thu, 7 Apr 2011 17:12:44 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from citadel.icyb.net.ua (citadel.icyb.net.ua [212.40.38.140]) by mx1.freebsd.org (Postfix) with ESMTP id B02268FC13 for ; Thu, 7 Apr 2011 17:12:43 +0000 (UTC) Received: from odyssey.starpoint.kiev.ua (alpha-e.starpoint.kiev.ua [212.40.38.101]) by citadel.icyb.net.ua (8.8.8p3/ICyb-2.3exp) with ESMTP id UAA19960 for ; Thu, 07 Apr 2011 20:12:39 +0300 (EEST) (envelope-from avg@FreeBSD.org) Message-ID: <4D9DF086.9020906@FreeBSD.org> Date: Thu, 07 Apr 2011 20:12:38 +0300 From: Andriy Gapon User-Agent: Mozilla/5.0 (X11; U; FreeBSD amd64; en-US; rv:1.9.2.15) Gecko/20110309 Lightning/1.0b2 Thunderbird/3.1.9 MIME-Version: 1.0 To: FreeBSD current X-Enigmail-Version: 1.1.2 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: Subject: prefer tsc timecounter when it's good X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Apr 2011 17:12:44 -0000 Guys, what do you think about the following change? The idea is mark TSC as the best timecounter when it's invariant and synchronized between cores. Unfortunately I don't have code to auto-detect the synchronization and keep relying on the corresponding tunable. I thought about auto-setting it for single-package configurations, but even that information is currently not trivial to get out of our mp (i386/amd64) machdep code. --- a/sys/x86/x86/tsc.c +++ b/sys/x86/x86/tsc.c @@ -169,6 +169,9 @@ init_TSC_tc(void) printf("TSC timecounter disabled: APM enabled.\n"); } + if (tsc_is_invariant) + tsc_timecounter.tc_quality = 1200; + #ifdef SMP /* * We can not use the TSC in SMP mode unless the TSCs on all CPUs -- Andriy Gapon