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Date:      Sat, 22 Apr 2023 15:24:51 GMT
From:      Justin Hibbits <jhibbits@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org
Subject:   git: 0468e89cb359 - main - zfs/powerpc64: Fix big-endian powerpc64 asm
Message-ID:  <202304221524.33MFOp1l005834@gitrepo.freebsd.org>

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The branch main has been updated by jhibbits:

URL: https://cgit.FreeBSD.org/src/commit/?id=0468e89cb35936d608cd2760135a791350f2f161

commit 0468e89cb35936d608cd2760135a791350f2f161
Author:     Justin Hibbits <jhibbits@FreeBSD.org>
AuthorDate: 2023-04-13 15:26:52 +0000
Commit:     Justin Hibbits <jhibbits@FreeBSD.org>
CommitDate: 2023-04-22 15:27:49 +0000

    zfs/powerpc64: Fix big-endian powerpc64 asm
    
    The powerpc asm from openzfs assumes that big-endian is always ELFv1 and
    ELFv2 is always little-endian, while FreeBSD uses ELFv2 everywhere.  Add
    the necessary bits to the checksum asm to work on big-endian ELFv2.
    
    This was also submitted upstream as PR#14779.
    
    Tested by:      dbaio
---
 sys/contrib/openzfs/lib/libspl/include/sys/simd.h        |  2 +-
 .../openzfs/module/icp/asm-ppc64/sha2/sha256-p8.S        | 15 +++++++++++++++
 .../openzfs/module/icp/asm-ppc64/sha2/sha256-ppc.S       | 15 +++++++++++++++
 .../openzfs/module/icp/asm-ppc64/sha2/sha512-p8.S        | 16 ++++++++++++++++
 .../openzfs/module/icp/asm-ppc64/sha2/sha512-ppc.S       | 15 +++++++++++++++
 5 files changed, 62 insertions(+), 1 deletion(-)

diff --git a/sys/contrib/openzfs/lib/libspl/include/sys/simd.h b/sys/contrib/openzfs/lib/libspl/include/sys/simd.h
index a106967d0725..41f9df506468 100644
--- a/sys/contrib/openzfs/lib/libspl/include/sys/simd.h
+++ b/sys/contrib/openzfs/lib/libspl/include/sys/simd.h
@@ -551,7 +551,7 @@ zfs_sha512_available(void)
 
 #elif defined(__powerpc__)
 
-#define	kfpu_allowed()		1
+#define	kfpu_allowed()		0
 #define	kfpu_initialize(tsk)	do {} while (0)
 #define	kfpu_begin()		do {} while (0)
 #define	kfpu_end()		do {} while (0)
diff --git a/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha256-p8.S b/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha256-p8.S
index 6bbfe23b6e15..dc3c4cea669c 100644
--- a/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha256-p8.S
+++ b/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha256-p8.S
@@ -21,6 +21,7 @@
 
 #if (defined(__PPC64__) && defined(__BIG_ENDIAN__))
 
+#if (!defined(_CALL_ELF) || _CALL_ELF == 1)
 .text
 
 .globl	zfs_sha256_power8
@@ -33,6 +34,16 @@ zfs_sha256_power8:
 .previous
 .align	6
 .zfs_sha256_power8:
+#else
+.abiversion	2
+.text
+
+.globl	zfs_sha256_power8
+.type	zfs_sha256_power8,@function
+.align	6
+zfs_sha256_power8:
+.localentry	zfs_sha256_power8,0
+#endif
 	stdu	1,-384(1)
 	mflr	8
 	li	10,207
@@ -677,8 +688,12 @@ zfs_sha256_power8:
 .long	0
 .byte	0,12,4,1,0x80,6,3,0
 .long	0
+#if (!defined(_CALL_ELF) || _CALL_ELF == 1)
 .size	.zfs_sha256_power8,.-.zfs_sha256_power8
 .size	zfs_sha256_power8,.-.zfs_sha256_power8
+#else
+.size	zfs_sha256_power8,.-zfs_sha256_power8
+#endif
 .align	6
 .LPICmeup:
 	mflr	0
diff --git a/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha256-ppc.S b/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha256-ppc.S
index 2219e313c9c6..d039bc36ee11 100644
--- a/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha256-ppc.S
+++ b/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha256-ppc.S
@@ -21,6 +21,7 @@
 
 #if (defined(__PPC64__) && defined(__BIG_ENDIAN__))
 
+#if (!defined(_CALL_ELF) || _CALL_ELF == 1)
 .text
 
 .globl	zfs_sha256_ppc
@@ -33,6 +34,16 @@ zfs_sha256_ppc:
 .previous
 .align	6
 .zfs_sha256_ppc:
+#else
+.abiversion	2
+.text
+
+.globl	zfs_sha256_ppc
+.type	zfs_sha256_ppc,@function
+.align	6
+zfs_sha256_ppc:
+.localentry	zfs_sha256_ppc,0
+#endif
 	stdu	1,-320(1)
 	mflr	0
 	sldi	5,5,6
@@ -1312,8 +1323,12 @@ zfs_sha256_ppc:
 	blr	
 .long	0
 .byte	0,12,0x14,0,0,0,0,0
+#if (!defined(_CALL_ELF) || _CALL_ELF == 1)
 .size	.zfs_sha256_ppc,.-.zfs_sha256_ppc
 .size	zfs_sha256_ppc,.-.zfs_sha256_ppc
+#else
+.size	zfs_sha256_ppc,.-zfs_sha256_ppc
+#endif
 .align	6
 .LPICmeup:
 	mflr	0
diff --git a/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha512-p8.S b/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha512-p8.S
index 39a90ede3dc5..2409c53385d6 100644
--- a/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha512-p8.S
+++ b/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha512-p8.S
@@ -21,6 +21,7 @@
 
 #if (defined(__PPC64__) && defined(__BIG_ENDIAN__))
 
+#if (!defined(_CALL_ELF) || _CALL_ELF == 1)
 .text
 
 .globl	zfs_sha512_power8
@@ -33,6 +34,17 @@ zfs_sha512_power8:
 .previous
 .align	6
 .zfs_sha512_power8:
+#else
+.abiversion	2
+.text
+
+.globl	zfs_sha512_power8
+.type	zfs_sha512_power8,@function
+.align	6
+zfs_sha512_power8:
+.localentry	zfs_sha512_power8,0
+#endif
+
 	stdu	1,-384(1)
 	mflr	8
 	li	10,207
@@ -679,8 +691,12 @@ zfs_sha512_power8:
 .long	0
 .byte	0,12,4,1,0x80,6,3,0
 .long	0
+#if (!defined(_CALL_ELF) || _CALL_ELF == 1)
 .size	.zfs_sha512_power8,.-.zfs_sha512_power8
 .size	zfs_sha512_power8,.-.zfs_sha512_power8
+#else
+.size	zfs_sha512_power8,.-zfs_sha512_power8
+#endif
 .align	6
 .LPICmeup:
 	mflr	0
diff --git a/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha512-ppc.S b/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha512-ppc.S
index 37070115c3ff..57213f68abc5 100644
--- a/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha512-ppc.S
+++ b/sys/contrib/openzfs/module/icp/asm-ppc64/sha2/sha512-ppc.S
@@ -21,6 +21,7 @@
 
 #if (defined(__PPC64__) && defined(__BIG_ENDIAN__))
 
+#if (!defined(_CALL_ELF) || _CALL_ELF == 1)
 .text
 
 .globl	zfs_sha512_ppc
@@ -33,6 +34,16 @@ zfs_sha512_ppc:
 .previous
 .align	6
 .zfs_sha512_ppc:
+#else
+.abiversion	2
+.text
+
+.globl	zfs_sha512_ppc
+.type	zfs_sha512_ppc,@function
+.align	6
+zfs_sha512_ppc:
+.localentry	zfs_sha512_ppc,0
+#endif
 	stdu	1,-384(1)
 	mflr	0
 	sldi	5,5,7
@@ -1350,8 +1361,12 @@ zfs_sha512_ppc:
 	blr	
 .long	0
 .byte	0,12,0x14,0,0,0,0,0
+#if (!defined(_CALL_ELF) || _CALL_ELF == 1)
 .size	.zfs_sha512_ppc,.-.zfs_sha512_ppc
 .size	zfs_sha512_ppc,.-.zfs_sha512_ppc
+#else
+.size	zfs_sha512_ppc,.-zfs_sha512_ppc
+#endif
 .align	6
 .LPICmeup:
 	mflr	0



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