From owner-svn-src-all@freebsd.org Fri May 25 07:33:22 2018 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 2F3FDF751F9; Fri, 25 May 2018 07:33:22 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id CA899767D2; Fri, 25 May 2018 07:33:21 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id A85081DDF2; Fri, 25 May 2018 07:33:21 +0000 (UTC) (envelope-from avg@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w4P7XLof026280; Fri, 25 May 2018 07:33:21 GMT (envelope-from avg@FreeBSD.org) Received: (from avg@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w4P7XKQk026275; Fri, 25 May 2018 07:33:20 GMT (envelope-from avg@FreeBSD.org) Message-Id: <201805250733.w4P7XKQk026275@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: avg set sender to avg@FreeBSD.org using -f From: Andriy Gapon Date: Fri, 25 May 2018 07:33:20 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r334204 - in head/sys: amd64/include dev/acpica i386/include x86/x86 X-SVN-Group: head X-SVN-Commit-Author: avg X-SVN-Commit-Paths: in head/sys: amd64/include dev/acpica i386/include x86/x86 X-SVN-Commit-Revision: 334204 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 25 May 2018 07:33:22 -0000 Author: avg Date: Fri May 25 07:33:20 2018 New Revision: 334204 URL: https://svnweb.freebsd.org/changeset/base/334204 Log: re-synchronize TSC-s on SMP systems after resume, if necessary The TSC-s are checked and synchronized only if they were good originally. That is, invariant, synchronized, etc. This is necessary on an AMD-based system where after a wakeup from STR I see that BSP clock differs from AP clocks by a count that roughly corresponds to one second. The APs are in sync with each other. Not sure if this is a hardware quirk or a firmware bug. This is what I see after a resume with this change: SMP: passed TSC synchronization test after adjustment acpi_timer0: restoring timecounter, ACPI-fast -> TSC-low Reviewed by: kib MFC after: 3 weeks Differential Revision: https://reviews.freebsd.org/D15551 Modified: head/sys/amd64/include/clock.h head/sys/dev/acpica/acpi.c head/sys/i386/include/clock.h head/sys/x86/x86/tsc.c Modified: head/sys/amd64/include/clock.h ============================================================================== --- head/sys/amd64/include/clock.h Fri May 25 07:29:52 2018 (r334203) +++ head/sys/amd64/include/clock.h Fri May 25 07:33:20 2018 (r334204) @@ -34,6 +34,7 @@ void clock_init(void); void startrtclock(void); void init_TSC(void); +void resume_TSC(void); #define HAS_TIMER_SPKR 1 int timer_spkr_acquire(void); Modified: head/sys/dev/acpica/acpi.c ============================================================================== --- head/sys/dev/acpica/acpi.c Fri May 25 07:29:52 2018 (r334203) +++ head/sys/dev/acpica/acpi.c Fri May 25 07:33:20 2018 (r334204) @@ -52,6 +52,7 @@ __FBSDID("$FreeBSD$"); #include #if defined(__i386__) || defined(__amd64__) +#include #include #endif #include @@ -3040,6 +3041,10 @@ backout: if (slp_state >= ACPI_SS_SLP_PREP) AcpiLeaveSleepState(state); if (slp_state >= ACPI_SS_SLEPT) { +#if defined(__i386__) || defined(__amd64__) + /* NB: we are still using ACPI timecounter at this point. */ + resume_TSC(); +#endif acpi_resync_clock(sc); acpi_enable_fixed_events(sc); } Modified: head/sys/i386/include/clock.h ============================================================================== --- head/sys/i386/include/clock.h Fri May 25 07:29:52 2018 (r334203) +++ head/sys/i386/include/clock.h Fri May 25 07:33:20 2018 (r334204) @@ -32,6 +32,7 @@ void clock_init(void); void startrtclock(void); void timer_restore(void); void init_TSC(void); +void resume_TSC(void); #define HAS_TIMER_SPKR 1 int timer_spkr_acquire(void); Modified: head/sys/x86/x86/tsc.c ============================================================================== --- head/sys/x86/x86/tsc.c Fri May 25 07:29:52 2018 (r334203) +++ head/sys/x86/x86/tsc.c Fri May 25 07:33:20 2018 (r334204) @@ -451,7 +451,7 @@ adj_smp_tsc(void *arg) } static int -test_tsc(void) +test_tsc(int adj_max_count) { uint64_t *data, *tsc; u_int i, size, adj; @@ -467,7 +467,7 @@ retry: smp_tsc = 1; /* XXX */ smp_rendezvous(smp_no_rendezvous_barrier, comp_smp_tsc, smp_no_rendezvous_barrier, data); - if (!smp_tsc && adj < smp_tsc_adjust) { + if (!smp_tsc && adj < adj_max_count) { adj++; smp_rendezvous(smp_no_rendezvous_barrier, adj_smp_tsc, smp_no_rendezvous_barrier, data); @@ -512,7 +512,7 @@ retry: * on uniprocessor kernel. */ static int -test_tsc(void) +test_tsc(int adj_max_count __unused) { return (0); @@ -579,7 +579,7 @@ init_TSC_tc(void) * environments, so it is set to a negative quality in those cases. */ if (mp_ncpus > 1) - tsc_timecounter.tc_quality = test_tsc(); + tsc_timecounter.tc_quality = test_tsc(smp_tsc_adjust); else if (tsc_is_invariant) tsc_timecounter.tc_quality = 1000; max_freq >>= tsc_shift; @@ -614,6 +614,30 @@ init: } } SYSINIT(tsc_tc, SI_SUB_SMP, SI_ORDER_ANY, init_TSC_tc, NULL); + +void +resume_TSC(void) +{ + int quality; + + /* If TSC was not good on boot, it is unlikely to become good now. */ + if (tsc_timecounter.tc_quality < 0) + return; + /* Nothing to do with UP. */ + if (mp_ncpus < 2) + return; + + /* + * If TSC was good, a single synchronization should be enough, + * but honour smp_tsc_adjust if it's set. + */ + quality = test_tsc(MAX(smp_tsc_adjust, 1)); + if (quality != tsc_timecounter.tc_quality) { + printf("TSC timecounter quality changed: %d -> %d\n", + tsc_timecounter.tc_quality, quality); + tsc_timecounter.tc_quality = quality; + } +} /* * When cpufreq levels change, find out about the (new) max frequency. We