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Date: Mon, 14 Dec 2020 22:45:45 +0100 In-Reply-To: <20201213180746.1224166dffb81cb6770ff80d@bidouilliste.com> Cc: Ian Lepore , freebsd-arm , Daniel Engberg To: Emmanuel Vadot References: <4434862ed87c21113fb7f98636fe4694d73856ce.camel@freebsd.org> <0D6FCA87-F101-4AA0-A1BF-6EDBA003BC9F@gmail.com> <87B7940E-119D-4C7F-AB9D-0C78E7F8D3A3@gmail.com> <20201213180746.1224166dffb81cb6770ff80d@bidouilliste.com> X-Mailer: Apple Mail (2.3608.120.23.2.4) X-Rspamd-Queue-Id: 4Cvw1T3t6Rz3s7S X-Spamd-Bar: -- Authentication-Results: mx1.freebsd.org; dkim=pass header.d=gmail.com header.s=20161025 header.b=QU3Q4ldm; dmarc=pass (policy=none) header.from=gmail.com; spf=pass (mx1.freebsd.org: domain of sorenschmidt@gmail.com designates 2a00:1450:4864:20::52b as permitted sender) smtp.mailfrom=sorenschmidt@gmail.com X-Spamd-Result: default: False [-2.50 / 15.00]; RCVD_VIA_SMTP_AUTH(0.00)[]; FREEMAIL_FROM(0.00)[gmail.com]; MV_CASE(0.50)[]; R_SPF_ALLOW(-0.20)[+ip6:2a00:1450:4000::/36]; RCVD_COUNT_THREE(0.00)[3]; TO_DN_ALL(0.00)[]; DKIM_TRACE(0.00)[gmail.com:+]; DMARC_POLICY_ALLOW(-0.50)[gmail.com,none]; NEURAL_HAM_SHORT(-1.00)[-1.000]; FROM_EQ_ENVFROM(0.00)[]; SUBJECT_ENDS_QUESTION(1.00)[]; MIME_TRACE(0.00)[0:+,1:+,2:~]; FREEMAIL_ENVFROM(0.00)[gmail.com]; ASN(0.00)[asn:15169, ipnet:2a00:1450::/32, country:US]; TAGGED_FROM(0.00)[]; DWL_DNSWL_NONE(0.00)[gmail.com:dkim]; ARC_NA(0.00)[]; RBL_DBL_DONT_QUERY_IPS(0.00)[2a00:1450:4864:20::52b:from]; R_DKIM_ALLOW(-0.20)[gmail.com:s=20161025]; MID_RHS_MATCH_FROM(0.00)[]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_THREE(0.00)[4]; NEURAL_HAM_MEDIUM(-1.00)[-1.000]; NEURAL_HAM_LONG(-1.00)[-1.000]; MIME_GOOD(-0.10)[multipart/alternative,text/plain]; SPAMHAUS_ZRD(0.00)[2a00:1450:4864:20::52b:from:127.0.2.255]; TO_MATCH_ENVRCPT_SOME(0.00)[]; RCVD_IN_DNSWL_NONE(0.00)[2a00:1450:4864:20::52b:from]; RCVD_TLS_ALL(0.00)[]; MAILMAN_DEST(0.00)[freebsd-arm] Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.34 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Dec 2020 21:45:50 -0000 > On 13 Dec 2020, at 18.07, Emmanuel Vadot = wrote: >=20 > I have two rockpro64 here. >=20 > The first one was sent to me by Pine when they launched the product > and the other one I received last month. > Both are labeled as v2.1 but the first one was produced opn 2018-06-06 > while the second one was on 2018-07-02 > Both works great and boot 100% of the time. >=20 > But there is indeed some difference in the dram setup. > Boot for the 0606 one : > U-Boot TPL 2020.10 (Dec 10 2020 - 10:13:59) > Channel 0: LPDDR4, 50MHz > BW=3D32 Col=3D10 Bk=3D8 CS0 Row=3D15 CS1 Row=3D15 CS=3D2 Die BW=3D16 = Size=3D2048MB > Channel 1: LPDDR4, 50MHz > BW=3D32 Col=3D10 Bk=3D8 CS0 Row=3D15 CS1 Row=3D15 CS=3D2 Die BW=3D16 = Size=3D2048MB > 256B stride > lpddr4_set_rate: change freq to 400000000 mhz 0, 1 > lpddr4_set_rate: change freq to 800000000 mhz 1, 0 >=20 > Boot for the 0702 one : > U-Boot TPL 2020.10 (Dec 10 2020 - 10:13:59) > Channel 0: LPDDR4, 50MHz > BW=3D32 Col=3D10 Bk=3D8 CS0 Row=3D16/15 CS=3D1 Die BW=3D16 Size=3D2048MB= > Channel 1: LPDDR4, 50MHz > BW=3D32 Col=3D10 Bk=3D8 CS0 Row=3D16/15 CS=3D1 Die BW=3D16 Size=3D2048MB= > 256B stride > lpddr4_set_rate: change freq to 400000000 mhz 0, 1 > lpddr4_set_rate: change freq to 800000000 mhz 1, 0 Same here 0702 version, outputs the exact same probe as yours. > Our u-boot ports doesn't do anything weird so I don't think that your > problem is related to this. > There is a lot of debug info available in > = https://github.com/u-boot/u-boot/blob/master/drivers/ram/rockchip/sdram_rk= 3399.c = > so maybe try to compile with debug enabled and see if it logs anything > useful ? Went to the official u-boot sources and tried the newest shiniest = 2021.01rc3 and it behaves a little bit better, it will boot 1 out of 3 = times :) Probe looks like this now: U-Boot TPL 2021.01-rc3 (Dec 14 2020 - 23:17:52) Channel 0: LPDDR4, 50MHz BW=3D32 Col=3D10 Bk=3D8 CS0 Row=3D16/15 CS=3D1 Die BW=3D16 Size=3D2048MB Channel 1: LPDDR4, 50MHz BW=3D32 Col=3D10 Bk=3D8 CS0 Row=3D16/15 CS=3D1 Die BW=3D16 Size=3D2048MB 256B stride lpddr4_set_rate: change freq to 400000000 mhz 0, 1 lpddr4_set_rate: change freq to 800000000 mhz 1, 0 The exact same as before. There is no difference in output from the = working boots to the failing ones. I=E2=80=99ll get on with adding some debug to what parameters get set = during memory setup etc. However I have this gut felling it is timing related and my board might = just be too slow/fast for some operation that the ayufan version does = slightly different (it boots every time). Anyhow, when it boots it runs rock stable, it builds worlds etc with no = issues.. -- S=C3=B8ren Schmidt sos@deepcore.dk / sos@freebsd.org "So much code to hack, so little time"