From owner-freebsd-arm@freebsd.org Wed Jul 15 15:56:59 2015 Return-Path: Delivered-To: freebsd-arm@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 307B19A1546 for ; Wed, 15 Jul 2015 15:56:59 +0000 (UTC) (envelope-from hps@selasky.org) Received: from mail.turbocat.net (heidi.turbocat.net [88.198.202.214]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id E74C9166D for ; Wed, 15 Jul 2015 15:56:58 +0000 (UTC) (envelope-from hps@selasky.org) Received: from laptop015.home.selasky.org (cm-176.74.213.204.customer.telag.net [176.74.213.204]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.turbocat.net (Postfix) with ESMTPSA id D1D871FE022; Wed, 15 Jul 2015 17:56:50 +0200 (CEST) Message-ID: <55A6830B.2050505@selasky.org> Date: Wed, 15 Jul 2015 17:58:03 +0200 From: Hans Petter Selasky User-Agent: Mozilla/5.0 (X11; FreeBSD amd64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: Daisuke Aoyama , Andreas Andersson , freebsd-arm@freebsd.org Subject: Re: Performance issues with raspberry pi 2 References: <3AB5ECCF20894591B4DF5FCBA8CA49BB@ad.peach.ne.jp> <2D17B16DBC5F452D8DAC721E17BBF1B7@ad.peach.ne.jp> In-Reply-To: <2D17B16DBC5F452D8DAC721E17BBF1B7@ad.peach.ne.jp> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Jul 2015 15:56:59 -0000 On 05/18/15 00:02, Daisuke Aoyama wrote: > > Previous subset does not work correctly in ratecheck. > I don't know a reason but same code from ODROID-C1 version works. > I re-create the patch as dwc_otg-rpi2-20150518.patch. > > http://www.peach.ne.jp/archives/rpi/patch/dwc_otg-rpi2-20150518.patch Hi, I've finally had time to look at your patch, and it has some clever new ideas to optimise the DWC OTG performance. I like it and will do some work to integrate your patches like promised this week. It might be too late for the coming 10.x release, but will for sure hit 10-stable when the next 10.x is out. Thank you! One question though: Are the WMB's and RMB's strictly needed? Isn't the I/O memory mapped coherently? Did you consider enabling the TXFIFOEMPTY IRQs instead of spinning? --HPS