Date: Sun, 15 Sep 2002 12:42:51 -0700 From: Peter Wemm <peter@wemm.org> To: Andrew Gallatin <gallatin@cs.duke.edu> Cc: Terry Lambert <tlambert2@mindspring.com>, "Campbell, Glenn" <CampbellG@mar.dfo-mpo.gc.ca>, smp@freebsd.org Subject: Re: Intel SE7500CW2 Mainboard SMP Problems Message-ID: <20020915194251.7A9152A88D@canning.wemm.org> In-Reply-To: <15742.32707.183751.698741@grasshopper.cs.duke.edu>
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Andrew Gallatin wrote:
>
> Terry Lambert writes:
> > > Is it possible our AP spinup code has never been tried with CPUs at
> > > anything other than the next physical id (eg, 1)?
> >
> > This was not the case historically. AP on 6 was the standard
> > for the boards PHK and Jack Vogel had. I know that there was
> > code to rewrite the APIC ID to linearize them, at one time.
> >
> > Is it now being assumed that it's linear? The ID is basically
>
> Not that I know -- it was just a WAG. All the x86 mp boards I've seen
> have had the first AP at #1, so I was assuming there might be a
> problem.
Nope, the system does not care about this. We use a logical to physical
addressing layer.
eg: quad xeon (Intel SKA2):
Processors: APIC ID Version State Family Model Step Flags
3 0x11 BSP, usable 6 7 3 0x387fbff
0 0x11 AP, usable 6 7 3 0x387fbff
1 0x11 AP, usable 6 7 3 0x387fbff
2 0x11 AP, usable 6 7 3 0x387fbff
compaq DL380:
Processors: APIC ID Version State Family Model Step Flags
3 0x10 BSP, usable 6 11 1 0x383fbff
0 0x10 AP, usable 6 11 1 0x383fbff
> Drew
>
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Cheers,
-Peter
--
Peter Wemm - peter@wemm.org; peter@FreeBSD.org; peter@yahoo-inc.com
"All of this is for nothing if we don't go to the stars" - JMS/B5
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