From owner-svn-src-head@freebsd.org Wed Sep 2 19:37:48 2020 Return-Path: Delivered-To: svn-src-head@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 515F53C763E; Wed, 2 Sep 2020 19:37:48 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4BhZ3J1Tw2z47pn; Wed, 2 Sep 2020 19:37:48 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 172CEF631; Wed, 2 Sep 2020 19:37:48 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 082Jbl61055272; Wed, 2 Sep 2020 19:37:47 GMT (envelope-from ian@FreeBSD.org) Received: (from ian@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 082JblRc055270; Wed, 2 Sep 2020 19:37:47 GMT (envelope-from ian@FreeBSD.org) Message-Id: <202009021937.082JblRc055270@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: ian set sender to ian@FreeBSD.org using -f From: Ian Lepore Date: Wed, 2 Sep 2020 19:37:47 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r365274 - in head: share/man/man4 sys/dev/iicbus/mux X-SVN-Group: head X-SVN-Commit-Author: ian X-SVN-Commit-Paths: in head: share/man/man4 sys/dev/iicbus/mux X-SVN-Commit-Revision: 365274 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 02 Sep 2020 19:37:48 -0000 Author: ian Date: Wed Sep 2 19:37:47 2020 New Revision: 365274 URL: https://svnweb.freebsd.org/changeset/base/365274 Log: In ltc430x(4), add the ability to configure control register 2 via FDT or hints data. Control register 2 holds the settings a user might want to configure, such as the timeout value for idle busses and whether to enable the mass-writes feature. Also add hint support for disconnecting idle busses (which was already supported using FDT data). Update the manpage with the new features, and also split the hints section into separate lists of required and optional hints. Modified: head/share/man/man4/ltc430x.4 head/sys/dev/iicbus/mux/ltc430x.c Modified: head/share/man/man4/ltc430x.4 ============================================================================== --- head/share/man/man4/ltc430x.4 Wed Sep 2 19:21:37 2020 (r365273) +++ head/share/man/man4/ltc430x.4 Wed Sep 2 19:37:47 2020 (r365274) @@ -26,7 +26,7 @@ .\" .\" $FreeBSD$ .\" -.Dd September 1, 2020 +.Dd September 2, 2020 .Dt LTC430X 4 .Os .Sh NAME @@ -85,12 +85,19 @@ ltc,downstream-accelerators-enable .It ltc,upstream-accelerators-enable .El +.Pp +In addition, the following additional property is supported: +.Bl -tag -offset indent -width indent +.It Va freebsd,ctlreg2 +A value to store into the chip's control register 2 during initialization. +Consult the chip datasheet for the meaning of the various bits in +the register. +.El .Sh HINTS CONFIGURATION On a .Xr device.hints 5 -based system, these values are configurable for -.Nm : -.Bl -tag -width indent +based system, the following hints are required: +.Bl -tag -offset indent -width indent .It Va hint.ltc430x..at The upstream .Xr iicbus 4 @@ -101,11 +108,33 @@ instance is attached to. The slave address of the .Nm instance on the upstream bus. +.It Va hint.ltc430x..chip_type +The type of chip the driver is controlling. +Valid values are +.Dq ltc4305 +and +.Dq ltc4306 . .El .Pp +The following hints are optional: +.Bl -tag -offset indent -width indent +.It Va hint.ltc430x..ctlreg2 +A value to store into the chip's control register 2 during initialization. +Consult the chip datasheet for the meaning of the various bits in +the register. +This hint is optional; when missing, the driver does not update control +register 2. +.It Va hint.ltc430x..idle_disconnect +Whether to disconnect all downstream busses from the upstream bus when idle. +If set to zero, the most recently used downstream bus is left connected to +the upstream bus after IO completes. +Any non-zero value causes all downstream busses to be disconnected when idle. +This hint is optional; when missing, the driver behaves as if it were zero. +.El +.Pp When configured via hints, the driver automatically adds an iicbus instance for every downstream bus supported by the chip. -There is currently no way to indicate used versus unused channels. +There is currently no way to indicate used versus unused downstream channels. .Sh SEE ALSO .Xr iicbus 4 , .Xr iicmux 4 , Modified: head/sys/dev/iicbus/mux/ltc430x.c ============================================================================== --- head/sys/dev/iicbus/mux/ltc430x.c Wed Sep 2 19:21:37 2020 (r365273) +++ head/sys/dev/iicbus/mux/ltc430x.c Wed Sep 2 19:37:47 2020 (r365274) @@ -79,6 +79,7 @@ struct ltc430x_softc { #define LTC430X_CTLREG_0 0 #define LTC430X_CTLREG_1 1 #define LTC430X_CTLREG_2 2 +#define LTC430X_CR2_ENABLE_MW (1u << 3) /* Enable mass write address. */ #define LTC430X_CTLREG_3 3 static int @@ -157,17 +158,39 @@ static int ltc430x_attach(device_t dev) { struct ltc430x_softc *sc __unused; - int chip, err, numchan; + int chip, err, numchan, val; + uint8_t busbits, ctlreg2; sc = device_get_softc(dev); + busbits = 0; + ctlreg2 = LTC430X_CR2_ENABLE_MW; + + /* + * Check for the idle-disconnect and ctlreg2 options, first in FDT data, + * then allow them to be overriden by hints data. + */ #ifdef FDT phandle_t node; node = ofw_bus_get_node(dev); sc->idle_disconnect = OF_hasprop(node, "i2c-mux-idle-disconnect"); + + if (OF_getprop(macnode, "freebsd,ctlreg2", &val, sizeof(val)) > 0) { + ctlreg2 = val; + } #endif + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "idle_disconnect", &val) == 0) { + sc->idle_disconnect = val; + } + + if (resource_int_value(device_get_name(dev), device_get_unit(dev), + "ctlreg2", &val) == 0) { + ctlreg2 = val; + } + /* We found the chip type when probing, so now it "can't fail". */ if ((chip = ltc430x_find_chiptype(dev)) == CHIP_NONE) { device_printf(dev, "impossible: can't identify chip type\n"); @@ -175,8 +198,22 @@ ltc430x_attach(device_t dev) } numchan = chip_infos[chip].numchannels; + /* Set control reg 2 with configured (or default) values. */ + iicdev_writeto(dev, LTC430X_CTLREG_2, &ctlreg2, sizeof(ctlreg2), + IIC_WAIT); + + /* If configured for idle-disconnect, ensure we start disconnected. */ + if (sc->idle_disconnect) { + iicdev_writeto(dev, LTC430X_CTLREG_3, &busbits, sizeof(busbits), + IIC_WAIT); + } + + /* + * Invoke the iicmux framework's attach code, and if it succeeds, invoke + * the probe and attach code of any child iicbus instances it added. + */ if ((err = iicmux_attach(dev, device_get_parent(dev), numchan)) == 0) - bus_generic_attach(dev); + bus_generic_attach(dev); return (err); }