From owner-freebsd-questions Tue Jan 30 10:06:46 1996 Return-Path: owner-questions Received: (from root@localhost) by freefall.freebsd.org (8.7.3/8.7.3) id KAA12253 for questions-outgoing; Tue, 30 Jan 1996 10:06:46 -0800 (PST) Received: from Sysiphos (Sysiphos.MI.Uni-Koeln.DE [134.95.212.10]) by freefall.freebsd.org (8.7.3/8.7.3) with SMTP id KAA12218 for ; Tue, 30 Jan 1996 10:06:20 -0800 (PST) Received: by Sysiphos id AA01614 (5.67b/IDA-1.5 for questions@FreeBSD.ORG); Tue, 30 Jan 1996 19:03:42 +0100 Message-Id: <199601301803.AA01614@Sysiphos> From: se@zpr.uni-koeln.de (Stefan Esser) Date: Tue, 30 Jan 1996 19:03:41 +0100 In-Reply-To: Eric Chet "Re: various questions" (Jan 30, 12:55) X-Mailer: Mail User's Shell (7.2.6 alpha(2) 7/9/95) To: Eric Chet Subject: Re: various questions Cc: questions@freebsd.org Sender: owner-questions@freebsd.org Precedence: bulk On Jan 30, 12:55, Eric Chet wrote: } Subject: Re: various questions } } } -- ejc } work: ejc@nasvr1.cb.att.com } home: ec0@ganet.net } } } On Mon, 29 Jan 1996, Jonathan M. Bresler wrote: } } > On Mon, 29 Jan 1996, Stefan Esser wrote: } > > I'd really love to have bytebench results for the SP3G with both } > > WRITE-BACK and WRITE-THROUGH secondary cache. The Dirty Tag RAM } > > seems to cost some $20, and it might be a good way to improve my } > > systems effective memory throughput. } > } > dont have bytebench results, but i do have make world results. } > } > write-through: } > 30638.79 real 16447.05 user 3895.20 sys } > write-back: } > 25740.88 real 15898.30 user 3779.36 sys } > } Hello } I have the same mainboard, with a dx2/66 a make world takes } about 28400 real for -stable, this is without the dirty tag sram. } It looks like I should get the dirty tag sram for the 16%, but will it work } with a Intel dx4/100? The Intel dx4/100 has a L1 write-back cache, will } this cause any problems with the saturn-II chipset with L2 write-back } cache? Well, I severly doubt you'll see a 16% improvement ... The different 'real' time measured is most probably caused by a different amount of (unrelated) load at the times of the compiles ... The 'user' and 'sys' times are much more reliable, and they indicate a 3% to 4% improvement over write-through ... The Dirty Tag RAM and write-back cache mode ought to make more of a difference on a DX4 system. But I doubt you'll see more than some 5% to 7% speedup. Regards, STefan -- Stefan Esser, Zentrum fuer Paralleles Rechnen Tel: +49 221 4706021 Universitaet zu Koeln, Weyertal 80, 50931 Koeln FAX: +49 221 4705160 ============================================================================== http://www.zpr.uni-koeln.de/~se