Skip site navigation (1)Skip section navigation (2)
Date:      Thu, 20 Dec 2012 13:15:35 -0800
From:      Oleksandr Tymoshenko <gonzo@freebsd.org>
To:        Hans Petter Selasky <hselasky@c2i.net>
Cc:        freebsd-usb@freebsd.org, freebsd-wireless@freebsd.org, Andrew Turner <andrew@fubar.geek.nz>
Subject:   Re: EHCI on armv6 with Write-Back caches
Message-ID:  <50D37FF7.6000301@freebsd.org>
In-Reply-To: <201212201946.34137.hselasky@c2i.net>
References:  <20121218204931.5322922d@fubar.geek.nz> <201212190956.28609.hselasky@c2i.net> <4A66C6C9-22EC-45AA-987D-49F958D7A8F9@bsdimp.com> <201212201946.34137.hselasky@c2i.net>

next in thread | previous in thread | raw e-mail | index | archive | help
On 12/20/2012 10:46 AM, Hans Petter Selasky wrote:
> Hi,
>
> I've run some basic tests over here (x86) which passed after some patch
> modifications. Please test and verify for your ARM targets:
>
> http://svnweb.freebsd.org/changeset/base/244500
> http://svnweb.freebsd.org/changeset/base/244503
>
> Please also verify that upgt and uwrt and uath still works like expected.
>

Thanks! I'll test umass on my ARM devices. EHCI driver suffers from this 
too. QH, QTD and
other structures mixes DMA data and non-DMA fields. Splitting them would 
be a right thing
to do too. Though I believe  EHCI vs. WB caches issue is more 
complicated then just this.



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?50D37FF7.6000301>