Date: Mon, 4 May 2015 14:55:22 +0000 (UTC) From: Ian Lepore <ian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r282418 - head/sys/arm/arm Message-ID: <201505041455.t44EtMUc055654@svn.freebsd.org>
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Author: ian Date: Mon May 4 14:55:21 2015 New Revision: 282418 URL: https://svnweb.freebsd.org/changeset/base/282418 Log: On an icache sync by address/len, round the length up if the operation spans a cacheline boundary. PR: 199740 Submitted by: Juergen Weiss <weiss@uni-mainz.de> Modified: head/sys/arm/arm/cpufunc_asm_armv7.S Modified: head/sys/arm/arm/cpufunc_asm_armv7.S ============================================================================== --- head/sys/arm/arm/cpufunc_asm_armv7.S Mon May 4 14:47:00 2015 (r282417) +++ head/sys/arm/arm/cpufunc_asm_armv7.S Mon May 4 14:55:21 2015 (r282418) @@ -266,6 +266,9 @@ END(armv7_icache_sync_all) ENTRY_NP(armv7_icache_sync_range) ldr ip, .Larmv7_icache_line_size ldr ip, [ip] + sub r3, ip, #1 /* Address need not be aligned, but */ + and r2, r0, r3 /* round length up if op spans line */ + add r1, r1, r2 /* boundary: len += addr & linemask; */ .Larmv7_sync_next: mcr CP15_DCCMVAC(r0) mcr CP15_ICIMVAU(r0)
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