From owner-freebsd-arm@freebsd.org Mon Jul 6 07:44:42 2020 Return-Path: Delivered-To: freebsd-arm@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id D947935EE2A for ; Mon, 6 Jul 2020 07:44:42 +0000 (UTC) (envelope-from danny@cs.huji.ac.il) Received: from mailman.nyi.freebsd.org (mailman.nyi.freebsd.org [IPv6:2610:1c1:1:606c::50:13]) by mx1.freebsd.org (Postfix) with ESMTP id 4B0czF3smZz4vLC for ; Mon, 6 Jul 2020 07:44:41 +0000 (UTC) (envelope-from danny@cs.huji.ac.il) Received: by mailman.nyi.freebsd.org (Postfix) id 8301235EE90; Mon, 6 Jul 2020 07:44:41 +0000 (UTC) Delivered-To: arm@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 82BC335EA7D for ; Mon, 6 Jul 2020 07:44:41 +0000 (UTC) (envelope-from danny@cs.huji.ac.il) Received: from kabab.cs.huji.ac.il (kabab.cs.huji.ac.il [132.65.116.210]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 4B0czD5LbKz4vLB for ; Mon, 6 Jul 2020 07:44:40 +0000 (UTC) (envelope-from danny@cs.huji.ac.il) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=cs.huji.ac.il; s=57791128; h=To:References:Message-Id:Content-Transfer-Encoding:Cc:Date:In-Reply-To:From:Subject:Mime-Version:Content-Type; bh=zaZxG3RfhHgzNz12QAoubQe/aVb8Kusr/Qhg2TIoeKw=; b=jylZK5U4lifh+DBtUTujDzFnp8Fvs/8wmfXOswE+acdmR+vcrxcxZNzCElwgnpnTV3nYULLnEiqfShKRZ3etEjoKwM0+pczlyVarthFWRFupL/Ka8ekKh2qLaNr91LItVXyxvIhRc7aTunetJg/7JmbjBx/AyjdaMQc7flGvfRDTWYctivplCAZEkBa7Wma6NFKAfK08R4coQMQRjxF0V3q6fNtbfUJec/meGxh/GSJLi6GJ+9ym/Iv2kJLT0sXnsGXqqC7uytkkhBg97WYWJlEnUOk55TwtbgdSfP7kHz8zHqA7L2A4g/kMtQDbUVXYZQNUVVhb8ka4V7Zk/Y3N+w==; Received: from bach.cs.huji.ac.il ([132.65.80.20]) by kabab.cs.huji.ac.il with esmtp id 1jsLnp-0009Qz-9Z; Mon, 06 Jul 2020 10:44:37 +0300 Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 11.5 \(3445.9.5\)) Subject: Re: allwinner/i2c interrupt storm detected From: Daniel Braniss In-Reply-To: <6CEF2B3D-FDC1-4EBC-80A8-42C5E9A356FC@cs.huji.ac.il> Date: Mon, 6 Jul 2020 10:44:36 +0300 Cc: "freebsd-arm@freebsd.org" Content-Transfer-Encoding: quoted-printable Message-Id: <3C934887-775C-4A73-A510-D74C8786DF04@cs.huji.ac.il> References: <10ACCB56-E18D-4102-B4E2-094157854AB7@cs.huji.ac.il> <20200704122944.64723bbb606d6e73128d2568@freenet.de> <20200705191435.c9c65caf64026ee881020f3a@bidouilliste.com> <6CEF2B3D-FDC1-4EBC-80A8-42C5E9A356FC@cs.huji.ac.il> To: Emmanuel Vadot X-Mailer: Apple Mail (2.3445.9.5) X-Rspamd-Queue-Id: 4B0czD5LbKz4vLB X-Spamd-Bar: -- Authentication-Results: mx1.freebsd.org; dkim=pass header.d=cs.huji.ac.il header.s=57791128 header.b=jylZK5U4; dmarc=pass (policy=none) header.from=huji.ac.il; spf=none (mx1.freebsd.org: domain of danny@cs.huji.ac.il has no SPF policy when checking 132.65.116.210) smtp.mailfrom=danny@cs.huji.ac.il X-Spamd-Result: default: False [-2.99 / 15.00]; ARC_NA(0.00)[]; NEURAL_HAM_MEDIUM(-1.02)[-1.023]; R_DKIM_ALLOW(-0.20)[cs.huji.ac.il:s=57791128]; FROM_HAS_DN(0.00)[]; MV_CASE(0.50)[]; NEURAL_HAM_LONG(-1.00)[-1.004]; MIME_GOOD(-0.10)[text/plain]; TO_MATCH_ENVRCPT_SOME(0.00)[]; TO_DN_ALL(0.00)[]; DKIM_TRACE(0.00)[cs.huji.ac.il:+]; RCPT_COUNT_TWO(0.00)[2]; RCVD_IN_DNSWL_NONE(0.00)[132.65.116.210:from]; NEURAL_HAM_SHORT(-0.67)[-0.667]; DMARC_POLICY_ALLOW(-0.50)[huji.ac.il,none]; R_SPF_NA(0.00)[no SPF record]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; RCVD_TLS_LAST(0.00)[]; ASN(0.00)[asn:378, ipnet:132.64.0.0/13, country:IL]; RCVD_COUNT_TWO(0.00)[2]; MID_RHS_MATCH_FROM(0.00)[] X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Jul 2020 07:44:42 -0000 > On 6 Jul 2020, at 08:51, Daniel Braniss wrote: >=20 >=20 >=20 >> On 5 Jul 2020, at 20:14, Emmanuel Vadot = wrote: >>=20 >>=20 >> Hi Daniel, Manuel, >>=20 >> On Sat, 4 Jul 2020 13:45:50 +0300 >> Daniel Braniss > = wrote: >>=20 >>>=20 >>>=20 >>>> On 4 Jul 2020, at 13:29, Manuel St=C3=BChn = wrote: >>>>=20 >>>> On Tue, 30 Jun 2020 16:01:41 +0300 >>>> Daniel Braniss > = wrote: >>>>=20 >>>>> Hi, >>>>>=20 >>>>> after a long time I decided to try and upgrade to stable 12.1 = r362793 since I saw some changes where done=20 >>>>> with respect to the DTS and twsi.c,=20 >>>>>=20 >>>>> if nothing is connected to the i2c, i2c -s just hangs, >>>>>=20 >>>>> if something is connected this is what i get on the console after = typing ?i2c -s? >>>>>=20 >>>>>=20 >>>>> Hardware may not support START/STOP scanning; trinterrupt storm = detected on "gic0,s6:"; throttling interrupt source >>>>> ying less-reliable read method. >>>>> interrupt storm detected on "gic0,s6:"; throttling interrupt = source >>>>> interrupt storm detected on "gic0,s6:"; throttling interrupt = source >>>>> ? >>>>>=20 >>>>> and >>>>> neo-04> vmstat -i >>>>> interrupt total = rate >>>>> gic0,p13:-ic_timer0 16052 = 164 >>>>> gic0,s0: uart2 318 = 3 >>>>> gic0,s6: iichb0 13034 = 133 >>>>> gic0,s60: aw_mmc0 1293 = 13 >>>>> gic0,s82: awg0 334 = 3 >>>>> gic0,s120: pmu0 49725 = 509 >>>>> cpu0:rendezvous 18 = 0 >>>>> cpu1:rendezvous 50 = 1 >>>>> cpu2:rendezvous 51 = 1 >>>>> cpu3:rendezvous 40 = 0 >>>>> cpu0:preempt 2691 = 28 >>>>> cpu1:preempt 3165 = 32 >>>>> cpu2:preempt 2778 = 28 >>>>> cpu3:preempt 2986 = 31 >>>>> cpu0:hardclock 15 = 0 >>>>> Total 92550 = 946 >>>>>=20 >>>>>=20 >>>>> the hardware is an NanoPi Neo >>>>> ---<>--- >>>>> KDB: debugger backends: ddb >>>>> KDB: current backend: ddb >>>>> Copyright (c) 1992-2020 The FreeBSD Project. >>>>> Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, = 1993, 1994 >>>>> The Regents of the University of California. All rights = reserved. >>>>> FreeBSD is a registered trademark of The FreeBSD Foundation. >>>>> FreeBSD 12.1-STABLE #0 r362793M: Tue Jun 30 11:39:11 IDT 2020 >>>>> = danny@nrnd:/home/obj/nrnd/arm/neo/vol/rnd/stable/12/arm.armv7/sys/AWGEN = arm >>>>> FreeBSD clang version 10.0.0 (git@github.com = :llvm/llvm-project.git = llvmorg-10.0.0-0-gd32170dbd5b) >>>>> VT: init without driver. >>>>> No PSCI/SMCCC call function found >>>>> CPU: ARM Cortex-A7 r0p5 (ECO: 0x00000000) >>>>> ? >>>>>=20 >>>>=20 >>>> I do not have a IRQ-Storm on my NanoPI NEO2, but a "i2s -s" does = never return. Commit v356609 broke i2c-support on my hardware (reverting = this single commit fixed it, bugreport filed: = https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D247576 = ). >>>>=20 >>>> Perhaps it is worth a try for you also to revert this commit and = test again... >>>>=20 >>>=20 >>> before the latest changes it works fine, and if you add my patch to = it, i2s -s will not hang: >>>=20 >>>> -- twsi.c (revision 346538) >>>> +++ twsi.c (working copy) >>>> @@ -458,8 +458,15 @@ >>>> if (sc->msg->len =3D=3D 1) >>>> sc->control_val &=3D ~TWSI_CONTROL_ACK; >>>> TWSI_WRITE(sc, sc->reg_control, sc->control_val | = TWSI_CONTROL_START); >>>> - while (sc->error =3D=3D 0 && sc->transfer !=3D 0) { >>>> - pause_sbt("twsi", SBT_1MS * 30, SBT_1MS, 0); >>>> + { >>>> + int count =3D 10; >>>> + while (sc->error =3D=3D 0 && sc->transfer !=3D = 0) { >>>> + pause_sbt("twsi", SBT_1MS * 30, = SBT_1MS, 0); >>>> + if(count-- =3D=3D 0) { >>>> + sc->error =3D EDEADLK; >>>> + break; >>>> + } >>>> + } >>>> } >>>>=20 >>>> debugf(dev, "Done with msg[%d]\n", i); >>>=20 >>>=20 >>> cheers, >>> danny >>>=20 >>>>=20 >>>> BR >>>> Manuel >>=20 >> Could you test the patch I've just attached to >> https://bugs.freebsd.org/bugzilla/show_bug.cgi?id=3D247576 = please ? >>=20 >> It doesn't fix everything and I'm still working on doing test on a = lot >> of different boards but this is clearly needed. >>=20 >> --=20 >> Emmanuel Vadot > = > >=20 >=20 > short version: it works! >=20 > longer version: > first tried with debugging on - worked > next tried with no debugging- worked >=20 > the next test will take some time, trying my app. > if I feel up to it, i can try on a neopi neo2 - but that will take = longer. >=20 > thanks Manu!!!! >=20 not out of the woods yet :-( my app hangs the kernel. it=E2=80=99s now stuck in what seems waiting for an interrupt that never = comes =E2=80=A6 this is the debug: neo-001# iichb0: twsi_calc_baud_rate: Bus clock is at 24000000 iichb0: twsi_reset: Using clock param=3D59 iichb0: TWSI_WRITE: Writing 0 to 18 iichb0: TWSI_WRITE: Writing 59 to 14 iichb0: TWSI_WRITE: Writing 40 to c iichb0: twsi_calc_baud_rate: Bus clock is at 24000000 iichb0: twsi_reset: Using clock param=3D59 iichb0: TWSI_WRITE: Writing 0 to 18 iichb0: TWSI_WRITE: Writing 59 to 14 iichb0: TWSI_WRITE: Writing 40 to c iichb0: TWSI_WRITE: Writing c4 to c iichb0: twsi_transfer: transmitting 2 messages iichb0: TWSI_READ: read f8 from 10 iichb0: twsi_transfer: status=3Df8 iichb0: TWSI_WRITE: Writing e4 to c iichb0: twsi_intr: Got interrupt Current msg=3D0 iichb0: TWSI_READ: read 8 from 10 iichb0: TWSI_READ: read cc from c iichb0: twsi_intr: reg control=3Dcc iichb0: twsi_intr: Send the address(48) iichb0: TWSI_WRITE: Writing 48 to 8 iichb0: TWSI_WRITE: Writing c4 to c iichb0: twsi_intr: Refresh reg_control iichb0: TWSI_WRITE: Writing cc to c iichb0: twsi_intr: Done with interrupts iichb0: twsi_intr: Got interrupt Current msg=3D0 iichb0: TWSI_READ: read 18 from 10 iichb0: TWSI_READ: read cc from c iichb0: twsi_intr: reg control=3Dcc iichb0: twsi_intr: Ack received after transmitting the address (write) iichb0: twsi_intr: Sending byte 0 =3D 0 iichb0: TWSI_WRITE: Writing 0 to 8 iichb0: TWSI_WRITE: Writing c4 to c iichb0: twsi_intr: Refresh reg_control iichb0: TWSI_WRITE: Writing cc to c iichb0: twsi_intr: Done with interrupts iichb0: twsi_intr: Got interrupt Current msg=3D0 iichb0: TWSI_READ: read 28 from 10 iichb0: TWSI_READ: read cc from c iichb0: twsi_intr: reg control=3Dcc iichb0: twsi_intr: Ack received after transmitting data iichb0: twsi_intr: Sending byte 1 =3D 0 iichb0: TWSI_WRITE: Writing 0 to 8 iichb0: TWSI_WRITE: Writing c4 to c iichb0: twsi_intr: Refresh reg_control iichb0: TWSI_WRITE: Writing cc to c iichb0: twsi_intr: Done with interrupts iichb0: twsi_intr: Got interrupt Current msg=3D0 iichb0: TWSI_READ: read 28 from 10 iichb0: TWSI_READ: read cc from c iichb0: twsi_intr: reg control=3Dcc iichb0: twsi_intr: Ack received after transmitting data iichb0: twsi_intr: Sending byte 2 =3D ff iichb0: TWSI_WRITE: Writing ff to 8 iichb0: TWSI_WRITE: Writing c4 to c iichb0: twsi_intr: Refresh reg_control iichb0: TWSI_WRITE: Writing cc to c iichb0: twsi_intr: Done with interrupts iichb0: twsi_intr: Got interrupt Current msg=3D0 iichb0: TWSI_READ: read 28 from 10 iichb0: TWSI_READ: read cc from c iichb0: twsi_intr: reg control=3Dcc iichb0: twsi_intr: Ack received after transmitting data iichb0: twsi_intr: Sending byte 3 =3D 2 iichb0: TWSI_WRITE: Writing 2 to 8 iichb0: TWSI_WRITE: Writing c4 to c iichb0: twsi_intr: Refresh reg_control iichb0: TWSI_WRITE: Writing cc to c iichb0: twsi_intr: Done with interrupts iichb0: twsi_intr: Got interrupt Current msg=3D0 iichb0: TWSI_READ: read 28 from 10 iichb0: TWSI_READ: read cc from c iichb0: twsi_intr: reg control=3Dcc iichb0: twsi_intr: Ack received after transmitting data iichb0: twsi_intr: Sending byte 4 =3D fe iichb0: TWSI_WRITE: Writing fe to 8 iichb0: TWSI_WRITE: Writing c4 to c iichb0: twsi_intr: Refresh reg_control iichb0: TWSI_WRITE: Writing cc to c iichb0: twsi_intr: Done with interrupts iichb0: twsi_intr: Got interrupt Current msg=3D0 iichb0: TWSI_READ: read 28 from 10 iichb0: TWSI_READ: read cc from c iichb0: twsi_intr: reg control=3Dcc iichb0: twsi_intr: Ack received after transmitting data iichb0: twsi_intr: Sending byte 5 =3D d4 iichb0: TWSI_WRITE: Writing d4 to 8 iichb0: TWSI_WRITE: Writing c4 to c iichb0: twsi_intr: Refresh reg_control iichb0: TWSI_WRITE: Writing cc to c iichb0: twsi_intr: Done with interrupts iichb0: twsi_intr: Got interrupt Current msg=3D0 iichb0: TWSI_READ: read 28 from 10 iichb0: TWSI_READ: read cc from c iichb0: twsi_intr: reg control=3Dcc iichb0: twsi_intr: Ack received after transmitting data iichb0: twsi_intr: Sending byte 6 =3D 2 iichb0: TWSI_WRITE: Writing 2 to 8 iichb0: TWSI_WRITE: Writing c4 to c iichb0: twsi_intr: Refresh reg_control iichb0: TWSI_WRITE: Writing cc to c iichb0: twsi_intr: Done with interrupts iichb0: twsi_intr: Got interrupt Current msg=3D0 iichb0: TWSI_READ: read 28 from 10 iichb0: TWSI_READ: read cc from c iichb0: twsi_intr: reg control=3Dcc iichb0: twsi_intr: Ack received after transmitting data iichb0: twsi_intr: Sending byte 7 =3D 2a iichb0: TWSI_WRITE: Writing 2a to 8 iichb0: TWSI_WRITE: Writing c4 to c iichb0: twsi_intr: Refresh reg_control iichb0: TWSI_WRITE: Writing cc to c iichb0: twsi_intr: Done with interrupts iichb0: twsi_intr: Got interrupt Current msg=3D0 iichb0: TWSI_READ: read 28 from 10 iichb0: TWSI_READ: read cc from c iichb0: twsi_intr: reg control=3Dcc iichb0: twsi_intr: Ack received after transmitting data iichb0: twsi_intr: Sending byte 8 =3D 0 iichb0: TWSI_WRITE: Writing 0 to 8 iichb0: TWSI_WRITE: Writing c4 to c iichb0: twsi_intr: Refresh reg_control iichb0: TWSI_WRITE: Writing cc to c iichb0: twsi_intr: Done with interrupts iichb0: twsi_intr: Got interrupt Current msg=3D0 iichb0: TWSI_READ: read 28 from 10 iichb0: TWSI_READ: read cc from c iichb0: twsi_intr: reg control=3Dcc iichb0: twsi_intr: Ack received after transmitting data iichb0: twsi_intr: Done sending all the bytes for msg 0 iichb0: twsi_intr: Done TX data, send stop iichb0: TWSI_WRITE: Writing d4 to c iichb0: twsi_intr: Refresh reg_control iichb0: TWSI_WRITE: Writing cc to c iichb0: twsi_intr: Done with interrupts and here it hangs. reboot is necessary. > danny >=20 >=20 > _______________________________________________ > freebsd-arm@freebsd.org mailing list > https://lists.freebsd.org/mailman/listinfo/freebsd-arm > To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org"