From owner-freebsd-mips@freebsd.org Thu Jan 11 23:26:50 2018 Return-Path: Delivered-To: freebsd-mips@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 96BEEEA6987 for ; Thu, 11 Jan 2018 23:26:50 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from mail.baldwin.cx (bigwig.baldwin.cx [IPv6:2001:470:1f11:75::1]) (using TLSv1 with cipher DHE-RSA-CAMELLIA256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 72CBC6AF91 for ; Thu, 11 Jan 2018 23:26:50 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from ralph.baldwin.cx (astound-66-234-199-215.ca.astound.net [66.234.199.215]) by mail.baldwin.cx (Postfix) with ESMTPSA id CFDB710A8BA; Thu, 11 Jan 2018 18:26:48 -0500 (EST) From: John Baldwin To: freebsd-mips@freebsd.org Cc: Warner Losh , Alex Zepeda Subject: Re: Switch to hard-float by default? Date: Thu, 11 Jan 2018 15:26:23 -0800 Message-ID: <18788446.orHcog1a1k@ralph.baldwin.cx> User-Agent: KMail/4.14.10 (FreeBSD/11.1-STABLE; KDE/4.14.30; amd64; ; ) In-Reply-To: References: <20180111004929.GA17499@bloaty> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.4.3 (mail.baldwin.cx); Thu, 11 Jan 2018 18:26:48 -0500 (EST) X-Virus-Scanned: clamav-milter 0.99.2 at mail.baldwin.cx X-Virus-Status: Clean X-BeenThere: freebsd-mips@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: Porting FreeBSD to MIPS List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Jan 2018 23:26:50 -0000 On Wednesday, January 10, 2018 08:10:23 PM Warner Losh wrote: > On Wed, Jan 10, 2018 at 5:49 PM, Alex Zepeda > wrote: > > > > On Wed, Jan 10, 2018 at 12:54 PM, John Baldwin wrote: > > > > > > > I have been working on LLVM libunwind patches for MIPS and the last > > round > > > > has > > > > been to teach the unwinder to handle hard-float. As part of this I > > just > > > > fixed > > > > a bug which had broken HF support for N32 (in review now), and I have a > > > > working 'mipsn32hf' world that boots under qemu. However, if I add > > > > 'mipsn32hf' to the list of known targets that is yet another world to > > add > > > > to make universe. I wonder if instead we should consider switching > > MIPS to > > > > assume hard-float by default? We made that change for 32-bit arm > > recently. > > > > > > > > The simplest approach would be to add 'mipsn32hf' and then remove all > > the > > > > non '*hf' targets from Makefile.inc1 (if we only wanted to support > > HF). A > > > > more drastic approach would be to change the existing 'mips*' targets > > to > > > > assume hard-float, remove all the '*hf' targets (which are only in 12 > > > > anyway > > > > I think?) and add in explicit '*sf' targets if anyone has a need for > > them. > > > > Given that none of the *hf targets have been MFC'd are only present in > > 12 > > > > anyway, maybe the more drastic route is actually better? If we do go > > that > > > > route, does anyone have a use case for a '*sf' target? That is, is > > anyone > > > > running FreeBSD/mips on a processor that does not include an FPA? > > > > > > > > > > I think that I retired the last set of SoCs that only had soft float. > > > > > > I think this is a good idea. > > > > > > The only use case I can think of is if I'm wrong and some of the early > > > Atheros SoCs can do soft float. But then we'd just have one supported > > > soft-float platform to worry about rather than the full generality we > > have > > > now. > > > > > > Warner > > > > Are you sure? I'm pretty sure a lot of the 32 bit SoCs don't have FPUs > > standard. I'm currently poking at a MediaTek 7621 board (EdgeRouter X) > > and it doesn't have an FPU. Looking through the MediaTek documents it > > looks > > like FPUs are an optional accessory on many of their SoCs. > > > > You may be right about that... > > I think there's a good case to be made for going the sf route here for > those that need it. I can think of other alternatives, but this is the > least bad one. If it is only 32-bit CPUs that need soft-float as an option then we could perhaps have mips64 and mipsn32 assume hard-float with 'mipshf' for 32-bit hard-float and leave 'mips' as-is. It would perhaps be less confusing in the long run (and consistent with other FreeBSD platforms) to go the *sf route though and have 'mipssf'. If we don't need mipsn32sf and mips64sf then supporting both hard and soft for 32-bit mips is not quite as onerous in terms of exploding the worlds built for 'make tinderbox', etc. If there are boards people are still using that don't support hard-float we should keep soft-float around though. I think it's mostly a matter of figuring out which combinations of ABI x big/little x hard/soft that are worth supporting. -- John Baldwin