From owner-freebsd-current@FreeBSD.ORG Wed Apr 16 04:43:05 2008 Return-Path: Delivered-To: current@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3BF5E1065670 for ; Wed, 16 Apr 2008 04:43:05 +0000 (UTC) (envelope-from peter@wemm.org) Received: from an-out-0708.google.com (an-out-0708.google.com [209.85.132.241]) by mx1.freebsd.org (Postfix) with ESMTP id F10A68FC21 for ; Wed, 16 Apr 2008 04:43:04 +0000 (UTC) (envelope-from peter@wemm.org) Received: by an-out-0708.google.com with SMTP id c14so665370anc.13 for ; Tue, 15 Apr 2008 21:43:04 -0700 (PDT) Received: by 10.101.66.14 with SMTP id t14mr13893788ank.113.1208320984159; Tue, 15 Apr 2008 21:43:04 -0700 (PDT) Received: by 10.100.8.6 with HTTP; Tue, 15 Apr 2008 21:43:04 -0700 (PDT) Message-ID: Date: Tue, 15 Apr 2008 21:43:04 -0700 From: "Peter Wemm" To: "David Malone" In-Reply-To: <20080415084602.GA44129@walton.maths.tcd.ie> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <18431.23276.913397.188219@grasshopper.cs.duke.edu> <20080414215057.B959@desktop> <20080415084602.GA44129@walton.maths.tcd.ie> Cc: gnn@freebsd.org, Jeff Roberson , Andrew Gallatin , current@freebsd.org Subject: Re: TSC Timecounter and multi-core/SMP X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 16 Apr 2008 04:43:05 -0000 On Tue, Apr 15, 2008 at 1:46 AM, David Malone wrote: > On Mon, Apr 14, 2008 at 09:51:42PM -1000, Jeff Roberson wrote: > > I think we should confirm whether this is the case with earlier opterson. > > I have seen two processors on the same die out of sync. > > This can definitely happen according to this note from AMD, which > someone posted a link to earlier in the thread: > > > http://lkml.org/lkml/2005/11/4/173 > > it can happen when you hlt one core, but don't hlt the other on > some processors. AMD even ship a special program / driver / hack / whatever that synchronizes the TSC on multi-core systems. The Athlon64 X2 that I have at home for games needs it for older programs to run correctly. I'm not in front of it right now, but I think it is called 'dual core cpu optimizer' or something vague like that. -- Peter Wemm - peter@wemm.org; peter@FreeBSD.org; peter@yahoo-inc.com "All of this is for nothing if we don't go to the stars" - JMS/B5 "If Java had true garbage collection, most programs would delete themselves upon execution." -- Robert Sewell