From owner-svn-ports-all@freebsd.org Thu Feb 27 22:15:06 2020 Return-Path: Delivered-To: svn-ports-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 3CD5B2511C2; Thu, 27 Feb 2020 22:15:06 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 48T6RY3P4Dz4DNm; Thu, 27 Feb 2020 22:15:05 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 5EC7C1FBF4; Thu, 27 Feb 2020 22:15:04 +0000 (UTC) (envelope-from mhorne@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 01RMF4x2036593; Thu, 27 Feb 2020 22:15:04 GMT (envelope-from mhorne@FreeBSD.org) Received: (from mhorne@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 01RMF3qs036590; Thu, 27 Feb 2020 22:15:03 GMT (envelope-from mhorne@FreeBSD.org) Message-Id: <202002272215.01RMF3qs036590@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mhorne set sender to mhorne@FreeBSD.org using -f From: Mitchell Horne Date: Thu, 27 Feb 2020 22:15:03 +0000 (UTC) To: ports-committers@freebsd.org, svn-ports-all@freebsd.org, svn-ports-head@freebsd.org Subject: svn commit: r527307 - head/sysutils/opensbi X-SVN-Group: ports-head X-SVN-Commit-Author: mhorne X-SVN-Commit-Paths: head/sysutils/opensbi X-SVN-Commit-Revision: 527307 X-SVN-Commit-Repository: ports MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-ports-all@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for the ports tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 27 Feb 2020 22:15:06 -0000 Author: mhorne (src committer) Date: Thu Feb 27 22:15:03 2020 New Revision: 527307 URL: https://svnweb.freebsd.org/changeset/ports/527307 Log: sysutils/opensbi: update to version 0.6 This update adds a new default option: SPIKE. This builds support for the Spike platform. Also, the toolchain dependency has been switched from riscv64-gcc to riscv64-none-elf-gcc. This release has: Relocation lottery in reference firmwares Preferred boot HART field in fw_dynamic_info Platform specific optional way to specify MISA Hypervisor v0.5 specification support SBI v0.2 TIME extension SBI v0.2 IPI extension SBI v0.2 RFENCE extension T-HEAD C910 platform support HART exit path support Dynamic creation of IPI events Dynamic registration of SBI extensions Removed qemu/sifive_u platform support Spike platform support Print MIDELEG and MEDELEG in boot prints Reviewed by: lwhsu Approved by: lwhsu Differential Revision: https://reviews.freebsd.org/D23820 Modified: head/sysutils/opensbi/Makefile head/sysutils/opensbi/distinfo head/sysutils/opensbi/pkg-plist Modified: head/sysutils/opensbi/Makefile ============================================================================== --- head/sysutils/opensbi/Makefile Thu Feb 27 21:26:58 2020 (r527306) +++ head/sysutils/opensbi/Makefile Thu Feb 27 22:15:03 2020 (r527307) @@ -2,28 +2,29 @@ PORTNAME= opensbi DISTVERSIONPREFIX=v -DISTVERSION= 0.5 +DISTVERSION= 0.6 CATEGORIES= sysutils MAINTAINER= mhorne@FreeBSD.org COMMENT= RISC-V SBI bootloader and firmware LICENSE= BSD2CLAUSE +BUILD_DEPENDS= ${RISCV_PREFIX}gcc:devel/riscv64-none-elf-gcc \ + ${RISCV_PREFIX}ld:devel/binutils@riscv64_none_elf USES= gmake USE_GITHUB= yes GH_ACCOUNT= riscv -RISCV_PREFIX= riscv64-unknown-${OPSYS:tl}${OSREL}- -BUILD_DEPENDS= ${RISCV_PREFIX}gcc:devel/riscv64-xtoolchain-gcc +RISCV_PREFIX= riscv64-none-elf- MAKE_ARGS= CROSS_COMPILE=${RISCV_PREFIX} I=${STAGEDIR}${PREFIX} OPTIONS_GROUP= PLATFORMS -OPTIONS_GROUP_PLATFORMS=QEMU_VIRT SIFIVE_FU540 +OPTIONS_GROUP_PLATFORMS=QEMU_VIRT SIFIVE_FU540 SPIKE OPTIONS_SUB= yes -OPTIONS_DEFAULT= QEMU_VIRT SIFIVE_FU540 +OPTIONS_DEFAULT= QEMU_VIRT SIFIVE_FU540 SPIKE QEMU_VIRT_DESC= Support for QEMU Virt platform QEMU_VIRT_PLATFORM= qemu/virt @@ -31,6 +32,10 @@ QEMU_VIRT_PLATFORM= qemu/virt SIFIVE_FU540_DESC= Support for SiFive U540 platform SIFIVE_FU540_PLATFORM= sifive/fu540 +SPIKE_DESC= Support for Spike ISA Simulator platform +SPIKE_PLATFORM= spike +SPIKE_STRIP_ARGS= -K tohost -K fromhost + INSTALL_TARGET= install .for platform in ${OPTIONS_GROUP_PLATFORMS} @@ -46,9 +51,8 @@ do-install-${platform}-on: I=${STAGEDIR}${DATADIR} install_libplatsbi post-install-${platform}-on: -.for i in dynamic jump payload - ${STRIP_CMD} ${STAGEDIR}${DATADIR}/platform/${${platform}_PLATFORM}/firmware/fw_${i}.elf -.endfor + ${STRIP_CMD} ${${platform}_STRIP_ARGS} \ + ${STAGEDIR}${DATADIR}/platform/${${platform}_PLATFORM}/firmware/fw_*.elf ${STRIP_CMD} ${STAGEDIR}${DATADIR}/platform/${${platform}_PLATFORM}/firmware/payloads/test.elf .endfor # OPTIONS_GROUP_PLATFORMS Modified: head/sysutils/opensbi/distinfo ============================================================================== --- head/sysutils/opensbi/distinfo Thu Feb 27 21:26:58 2020 (r527306) +++ head/sysutils/opensbi/distinfo Thu Feb 27 22:15:03 2020 (r527307) @@ -1,3 +1,3 @@ -TIMESTAMP = 1571500133 -SHA256 (riscv-opensbi-v0.5_GH0.tar.gz) = bc82f1e63663cafb7976b324d8a01263510cfd816063dc89e0ccffb9763fb1dd -SIZE (riscv-opensbi-v0.5_GH0.tar.gz) = 138745 +TIMESTAMP = 1582555902 +SHA256 (riscv-opensbi-v0.6_GH0.tar.gz) = 46a93afd5465eba094ddba40015e754bf09f9e80e0702c00013d6bdb3ecd0a72 +SIZE (riscv-opensbi-v0.6_GH0.tar.gz) = 148351 Modified: head/sysutils/opensbi/pkg-plist ============================================================================== --- head/sysutils/opensbi/pkg-plist Thu Feb 27 21:26:58 2020 (r527306) +++ head/sysutils/opensbi/pkg-plist Thu Feb 27 22:15:03 2020 (r527307) @@ -6,7 +6,6 @@ include/sbi/riscv_encoding.h include/sbi/riscv_fp.h include/sbi/riscv_io.h include/sbi/riscv_locks.h -include/sbi/riscv_unpriv.h include/sbi/sbi_bitops.h include/sbi/sbi_bits.h include/sbi/sbi_console.h @@ -17,9 +16,11 @@ include/sbi/sbi_emulate_csr.h include/sbi/sbi_error.h include/sbi/sbi_fifo.h include/sbi/sbi_hart.h +include/sbi/sbi_hfence.h include/sbi/sbi_illegal_insn.h include/sbi/sbi_init.h include/sbi/sbi_ipi.h +include/sbi/sbi_list.h include/sbi/sbi_misaligned_ldst.h include/sbi/sbi_platform.h include/sbi/sbi_scratch.h @@ -29,11 +30,13 @@ include/sbi/sbi_timer.h include/sbi/sbi_tlb.h include/sbi/sbi_trap.h include/sbi/sbi_types.h +include/sbi/sbi_unpriv.h include/sbi/sbi_version.h include/sbi_utils/irqchip/plic.h include/sbi_utils/serial/sifive-uart.h include/sbi_utils/serial/uart8250.h include/sbi_utils/sys/clint.h +include/sbi_utils/sys/htif.h lib/libsbi.a lib/libsbiutils.a %%QEMU_VIRT%%%%DATADIR%%/platform/qemu/virt/firmware/fw_dynamic.bin @@ -54,3 +57,10 @@ lib/libsbiutils.a %%SIFIVE_FU540%%%%DATADIR%%/platform/sifive/fu540/firmware/payloads/test.bin %%SIFIVE_FU540%%%%DATADIR%%/platform/sifive/fu540/firmware/payloads/test.elf %%SIFIVE_FU540%%%%DATADIR%%/platform/sifive/fu540/lib/libplatsbi.a +%%SPIKE%%%%DATADIR%%/platform/spike/firmware/fw_jump.bin +%%SPIKE%%%%DATADIR%%/platform/spike/firmware/fw_jump.elf +%%SPIKE%%%%DATADIR%%/platform/spike/firmware/fw_payload.bin +%%SPIKE%%%%DATADIR%%/platform/spike/firmware/fw_payload.elf +%%SPIKE%%%%DATADIR%%/platform/spike/firmware/payloads/test.bin +%%SPIKE%%%%DATADIR%%/platform/spike/firmware/payloads/test.elf +%%SPIKE%%%%DATADIR%%/platform/spike/lib/libplatsbi.a