From owner-cvs-src@FreeBSD.ORG Wed Sep 24 00:40:49 2008 Return-Path: Delivered-To: cvs-src@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0096E1065679; Wed, 24 Sep 2008 00:40:49 +0000 (UTC) (envelope-from nwhitehorn@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id DF6E98FC3D; Wed, 24 Sep 2008 00:40:48 +0000 (UTC) (envelope-from nwhitehorn@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id m8O0emAr071648; Wed, 24 Sep 2008 00:40:48 GMT (envelope-from nwhitehorn@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id m8O0emQE071533; Wed, 24 Sep 2008 00:40:48 GMT (envelope-from nwhitehorn@repoman.freebsd.org) Message-Id: <200809240040.m8O0emQE071533@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to nwhitehorn@repoman.freebsd.org using -f From: Nathan Whitehorn Date: Wed, 24 Sep 2008 00:28:46 +0000 (UTC) To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org X-FreeBSD-CVS-Branch: HEAD Cc: Subject: cvs commit: src/lib/libc/powerpc/gen syncicache.c src/sys/powerpc/aim machdep.c src/sys/powerpc/booke machdep.c src/sys/powerpc/include md_var.h src/sys/powerpc/powerpc syncicache.c X-BeenThere: cvs-src@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Sep 2008 00:40:49 -0000 nwhitehorn 2008-09-24 00:28:46 UTC FreeBSD src repository Modified files: lib/libc/powerpc/gen syncicache.c sys/powerpc/aim machdep.c sys/powerpc/booke machdep.c sys/powerpc/include md_var.h sys/powerpc/powerpc syncicache.c Log: SVN rev 183319 on 2008-09-24 00:28:46Z by nwhitehorn Allow the cacheline size on PowerPC to be set at runtime. This is essential for supporting 64-bit CPUs, which often have 128-byte cache lines instead of the standard 32. Revision Changes Path 1.5 +16 -16 src/lib/libc/powerpc/gen/syncicache.c 1.118 +4 -4 src/sys/powerpc/aim/machdep.c 1.8 +3 -2 src/sys/powerpc/booke/machdep.c 1.33 +1 -4 src/sys/powerpc/include/md_var.h 1.7 +12 -36 src/sys/powerpc/powerpc/syncicache.c