From owner-freebsd-stable@FreeBSD.ORG Wed Dec 15 23:00:43 2010 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2244410656AC; Wed, 15 Dec 2010 23:00:43 +0000 (UTC) (envelope-from fullermd@over-yonder.net) Received: from thyme.infocus-llc.com (server.infocus-llc.com [206.156.254.44]) by mx1.freebsd.org (Postfix) with ESMTP id E59548FC18; Wed, 15 Dec 2010 23:00:42 +0000 (UTC) Received: from draco.over-yonder.net (c-75-64-226-141.hsd1.ms.comcast.net [75.64.226.141]) (using TLSv1 with cipher ADH-CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by thyme.infocus-llc.com (Postfix) with ESMTPSA id BED2737B48A; Wed, 15 Dec 2010 17:00:41 -0600 (CST) Received: by draco.over-yonder.net (Postfix, from userid 100) id 396C261C5C; Wed, 15 Dec 2010 17:00:41 -0600 (CST) Date: Wed, 15 Dec 2010 17:00:41 -0600 From: "Matthew D. Fuller" To: Jeremie Le Hen Message-ID: <20101215230041.GC66337@over-yonder.net> References: <20101215082837.GA8734@felucia.tataz.chchile.org> <4D08FAD9.4010300@freebsd.org> <20101215225540.GD8734@felucia.tataz.chchile.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20101215225540.GD8734@felucia.tataz.chchile.org> X-Editor: vi X-OS: FreeBSD User-Agent: Mutt/1.5.21-fullermd.4 (2010-09-15) X-Virus-Scanned: clamav-milter 0.96.5 at thyme.infocus-llc.com X-Virus-Status: Clean Cc: freebsd-stable@freebsd.org, Andriy Gapon Subject: Re: Panic in ZFS layer on 8.1-STABLE X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Dec 2010 23:00:43 -0000 On Wed, Dec 15, 2010 at 11:55:40PM +0100 I heard the voice of Jeremie Le Hen, and lo! it spake thus: > > I think running a 64 bits kernel would help a lot in that case. > Unfortunately I don't think my CPU supports the instruction set: It does. > AMD Features=0x20000000 LM = Long Mode All the Core 2's are 64-bit capable. I think even the Core's were. -- Matthew Fuller (MF4839) | fullermd@over-yonder.net Systems/Network Administrator | http://www.over-yonder.net/~fullermd/ On the Internet, nobody can hear you scream.