From owner-p4-projects@FreeBSD.ORG Sun May 6 13:50:52 2012 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id E12071065672; Sun, 6 May 2012 13:50:51 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id A3665106566C for ; Sun, 6 May 2012 13:50:51 +0000 (UTC) (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:4f8:fff6::2d]) by mx1.freebsd.org (Postfix) with ESMTP id 50A4C8FC0A for ; Sun, 6 May 2012 13:50:51 +0000 (UTC) Received: from skunkworks.freebsd.org (localhost [127.0.0.1]) by skunkworks.freebsd.org (8.14.4/8.14.4) with ESMTP id q46Dop9L096917 for ; Sun, 6 May 2012 13:50:51 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.4/8.14.4/Submit) id q46DopGZ096912 for perforce@freebsd.org; Sun, 6 May 2012 13:50:51 GMT (envelope-from bb+lists.freebsd.perforce@cyrus.watson.org) Date: Sun, 6 May 2012 13:50:51 GMT Message-Id: <201205061350.q46DopGZ096912@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to bb+lists.freebsd.perforce@cyrus.watson.org using -f From: Robert Watson To: Perforce Change Reviews Precedence: bulk Cc: Subject: PERFORCE change 210730 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 06 May 2012 13:50:52 -0000 http://p4web.freebsd.org/@@210730?ac=10 Change 210730 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/05/06 13:49:47 Fix a driver bug in which the character and attribute data were byte order swapped. Define a number of useful constants for working with the MTL display, such as sub-field offsets in the blend register, MTL colour definitions, alpha-blending, etc. Add a softc mutex used to serialise read-modify-write sequences on MTL control registers. Add C functions to separately set sub-fields of the MTL blend register. After the MTL syscons attachment has initialised, set the blend register to just display the text frame buffer. Affected files ... .. //depot/projects/ctsrd/beribsd/src/sys/dev/terasic/mtl/terasic_mtl.c#3 edit .. //depot/projects/ctsrd/beribsd/src/sys/dev/terasic/mtl/terasic_mtl.h#4 edit .. //depot/projects/ctsrd/beribsd/src/sys/dev/terasic/mtl/terasic_mtl_reg.c#4 edit .. //depot/projects/ctsrd/beribsd/src/sys/dev/terasic/mtl/terasic_mtl_text.c#4 edit Differences ... ==== //depot/projects/ctsrd/beribsd/src/sys/dev/terasic/mtl/terasic_mtl.c#3 (text+ko) ==== @@ -84,6 +84,10 @@ error = terasic_mtl_syscons_attach(sc); if (error == 0) return (0); + terasic_mtl_blend_default_set(sc, TERASIC_MTL_COLOR_BLACK); + terasic_mtl_blend_pixel_set(sc, TERASIC_MTL_ALPHA_TRANSPARENT); + terasic_mtl_blend_textfg_set(sc, TERASIC_MTL_ALPHA_OPAQUE); + terasic_mtl_blend_textbg_set(sc, TERASIC_MTL_ALPHA_OPAQUE); error: terasic_mtl_text_detach(sc); terasic_mtl_pixel_detach(sc); ==== //depot/projects/ctsrd/beribsd/src/sys/dev/terasic/mtl/terasic_mtl.h#4 (text+ko) ==== @@ -46,6 +46,13 @@ int mtl_unit; /* + * The MTL driver doesn't require a lot of synchronisation; however, + * the lock is used to protect read-modify-write operations on MTL + * registers. + */ + struct mtx mtl_lock; + + /* * Control register device -- mappable from userspace. */ struct cdev *mtl_reg_cdev; @@ -69,6 +76,13 @@ uint16_t *mtl_text_soft; }; +#define TERASIC_MTL_LOCK(sc) mtx_lock(&(sc)->mtl_lock) +#define TERASIC_MTL_LOCK_ASSERT(sc) mtx_assert(&(sc)->mtl_lock, MA_OWNED) +#define TERASIC_MTL_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtl_lock) +#define TERASIC_MTL_LOCK_INIT(sc) mtx_init(&(sc)->mtl_lock, \ + "terasic_mtl", NULL, MTX_DEF) +#define TERASIC_MTL_UNLOCK(sc) mtx_unlock(&(sc)->mtl_lock) + /* * Constant properties of the MTL text frame buffer. */ @@ -78,7 +92,7 @@ /* * MTL control register offsets. */ -#define TERASIC_MTL_OFF_FRAMEBLENDING 0 +#define TERASIC_MTL_OFF_BLEND 0 #define TERASIC_MTL_OFF_TEXTCURSOR 4 #define TERASIC_MTL_OFF_TEXTFRAMEBUFADDR 8 #define TERASIC_MTL_OFF_TOUCHPOINT_X1 12 @@ -90,15 +104,51 @@ /* * Constants to help interpret various control registers. */ +#define TERASIC_MTL_BLEND_DEFAULT_MASK 0x0f000000 +#define TERASIC_MTL_BLEND_DEFAULT_SHIFT 24 +#define TERASIC_MTL_BLEND_PIXEL_MASK 0x00ff0000 +#define TERASIC_MTL_BLEND_PIXEL_SHIFT 16 +#define TERASIC_MTL_BLEND_TEXTFG_MASK 0x0000ff00 +#define TERASIC_MTL_BLEND_TEXTFG_SHIFT 8 +#define TERASIC_MTL_BLEND_TEXTBG_MASK 0x000000ff +#define TERASIC_MTL_BLEND_TEXTBG_SHIFT 0 #define TERASIC_MTL_TEXTCURSOR_COL_MASK 0xff00 #define TERASIC_MTL_TEXTCURSOR_COL_SHIFT 8 #define TERASIC_MTL_TEXTCURSOR_ROW_MASK 0xff /* + * Colours used both by VGA-like text rendering, and for the default display + * colour. + */ +#define TERASIC_MTL_COLOR_BLACK 0 +#define TERASIC_MTL_COLOR_DARKBLUE 1 +#define TERASIC_MTL_COLOR_DARKGREEN 2 +#define TERASIC_MTL_COLOR_DARKCYAN 3 +#define TERASIC_MTL_COLOR_DARKRED 4 +#define TERASIC_MTL_COLOR_DARKMAGENTA 5 +#define TERASIC_MTL_COLOR_BROWN 6 +#define TERASIC_MTL_COLOR_LIGHTGREY 7 +#define TERASIC_MTL_COLOR_DARKGREY 8 +#define TERASIC_MTL_COLOR_LIGHTBLUE 9 +#define TERASIC_MTL_COLOR_LIGHTGREEN 10 +#define TERASIC_MTL_COLOR_LIGHTCYAN 11 +#define TERASIC_MTL_COLOR_LIGHTRED 12 +#define TERASIC_MTL_COLOR_LIGHTMAGENTA 13 +#define TERASIC_MTL_COLOR_LIGHTYELLOW 14 +#define TERASIC_MTL_COLOR_WHITE 15 +#define TERASIC_MTL_COLORMASK_BLINK 0x80 + +/* * Constants to help interpret the text frame buffer. */ -#define TERASIC_MTL_TEXTFRAMEBUF_CHAR_SHIFT 8 -#define TERASIC_MTL_TEXTFRAMEBUF_ATTR_SHIFT 0 +#define TERASIC_MTL_TEXTFRAMEBUF_CHAR_SHIFT 0 +#define TERASIC_MTL_TEXTFRAMEBUF_ATTR_SHIFT 8 + +/* + * Alpha-blending constants. + */ +#define TERASIC_MTL_ALPHA_TRANSPARENT 0 +#define TERASIC_MTL_ALPHA_OPAQUE 255 /* * Driver setup routines from the bus attachment/teardown. @@ -122,6 +172,11 @@ * Control register I/O routines. */ void terasic_mtl_reg_blank(struct terasic_mtl_softc *sc); + +void terasic_mtl_reg_blend_get(struct terasic_mtl_softc *sc, + uint32_t *blendp); +void terasic_mtl_reg_blend_set(struct terasic_mtl_softc *sc, + uint32_t blend); void terasic_mtl_reg_textcursor_get(struct terasic_mtl_softc *sc, uint8_t *colp, uint8_t *rowp); void terasic_mtl_reg_textcursor_set(struct terasic_mtl_softc *sc, @@ -132,6 +187,18 @@ uint32_t addr); /* + * Read-modify-write updates of sub-bytes of the blend register. + */ +void terasic_mtl_blend_default_set(struct terasic_mtl_softc *sc, + uint8_t colour); +void terasic_mtl_blend_pixel_set(struct terasic_mtl_softc *sc, + uint8_t alpha); +void terasic_mtl_blend_textfg_set(struct terasic_mtl_softc *sc, + uint8_t alpha); +void terasic_mtl_blend_textbg_set(struct terasic_mtl_softc *sc, + uint8_t alpha); + +/* * Text frame buffer I/O routines. */ void terasic_mtl_text_putc(struct terasic_mtl_softc *sc, u_int x, u_int y, ==== //depot/projects/ctsrd/beribsd/src/sys/dev/terasic/mtl/terasic_mtl_reg.c#4 (text+ko) ==== @@ -139,6 +139,68 @@ } void +terasic_mtl_reg_blend_get(struct terasic_mtl_softc *sc, uint32_t *blendp) +{ + + *blendp = le32toh(bus_read_4(sc->mtl_reg_res, TERASIC_MTL_OFF_BLEND)); +} + +void +terasic_mtl_reg_blend_set(struct terasic_mtl_softc *sc, uint32_t blend) +{ + + bus_write_4(sc->mtl_reg_res, TERASIC_MTL_OFF_BLEND, htole32(blend)); +} + +void +terasic_mtl_blend_default_set(struct terasic_mtl_softc *sc, uint8_t colour) +{ + uint32_t v; + + TERASIC_MTL_LOCK(sc); + terasic_mtl_reg_blend_get(sc, &v); + v &= ~TERASIC_MTL_BLEND_DEFAULT_MASK; + v |= colour << TERASIC_MTL_BLEND_DEFAULT_SHIFT; + TERASIC_MTL_UNLOCK(sc); +} + +void +terasic_mtl_blend_pixel_set(struct terasic_mtl_softc *sc, uint8_t alpha) +{ + uint32_t v; + + TERASIC_MTL_LOCK(sc); + terasic_mtl_reg_blend_get(sc, &v); + v &= ~TERASIC_MTL_BLEND_PIXEL_MASK; + v |= alpha << TERASIC_MTL_BLEND_PIXEL_SHIFT; + TERASIC_MTL_UNLOCK(sc); +} + +void +terasic_mtl_blend_textfg_set(struct terasic_mtl_softc *sc, uint8_t alpha) +{ + uint32_t v; + + TERASIC_MTL_LOCK(sc); + terasic_mtl_reg_blend_get(sc, &v); + v &= ~TERASIC_MTL_BLEND_TEXTFG_MASK; + v |= alpha << TERASIC_MTL_BLEND_TEXTFG_SHIFT; + TERASIC_MTL_UNLOCK(sc); +} + +void +terasic_mtl_blend_textbg_set(struct terasic_mtl_softc *sc, uint8_t alpha) +{ + uint32_t v; + + TERASIC_MTL_LOCK(sc); + terasic_mtl_reg_blend_get(sc, &v); + v &= ~TERASIC_MTL_BLEND_TEXTBG_MASK; + v |= alpha << TERASIC_MTL_BLEND_TEXTBG_SHIFT; + TERASIC_MTL_UNLOCK(sc); +} + +void terasic_mtl_reg_textcursor_get(struct terasic_mtl_softc *sc, uint8_t *colp, uint8_t *rowp) { ==== //depot/projects/ctsrd/beribsd/src/sys/dev/terasic/mtl/terasic_mtl_text.c#4 (text+ko) ==== @@ -188,6 +188,7 @@ return (ENXIO); } /* XXXRW: Slight race between make_dev(9) and here. */ + TERASIC_MTL_LOCK_INIT(sc); sc->mtl_text_cdev->si_drv1 = sc; return (0); } @@ -196,6 +197,8 @@ terasic_mtl_text_detach(struct terasic_mtl_softc *sc) { - if (sc->mtl_text_cdev != NULL) + if (sc->mtl_text_cdev != NULL) { destroy_dev(sc->mtl_text_cdev); + TERASIC_MTL_LOCK_DESTROY(sc); + } }