From owner-svn-src-user@FreeBSD.ORG Tue Apr 27 20:55:57 2010 Return-Path: Delivered-To: svn-src-user@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 0F747106566C; Tue, 27 Apr 2010 20:55:57 +0000 (UTC) (envelope-from jmallett@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id EA5548FC1B; Tue, 27 Apr 2010 20:55:56 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o3RKtu2F020280; Tue, 27 Apr 2010 20:55:56 GMT (envelope-from jmallett@svn.freebsd.org) Received: (from jmallett@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o3RKtuUn020277; Tue, 27 Apr 2010 20:55:56 GMT (envelope-from jmallett@svn.freebsd.org) Message-Id: <201004272055.o3RKtuUn020277@svn.freebsd.org> From: Juli Mallett Date: Tue, 27 Apr 2010 20:55:56 +0000 (UTC) To: src-committers@freebsd.org, svn-src-user@freebsd.org X-SVN-Group: user MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r207296 - user/jmallett/octeon/sys/mips/cavium X-BeenThere: svn-src-user@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the experimental " user" src tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 27 Apr 2010 20:55:57 -0000 Author: jmallett Date: Tue Apr 27 20:55:56 2010 New Revision: 207296 URL: http://svn.freebsd.org/changeset/base/207296 Log: Remove unused defines and move the last used one in pcmap_regs.h to be with its counterpart in octeon_machdep.c. Modified: user/jmallett/octeon/sys/mips/cavium/octeon_machdep.c user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h Modified: user/jmallett/octeon/sys/mips/cavium/octeon_machdep.c ============================================================================== --- user/jmallett/octeon/sys/mips/cavium/octeon_machdep.c Tue Apr 27 20:53:33 2010 (r207295) +++ user/jmallett/octeon/sys/mips/cavium/octeon_machdep.c Tue Apr 27 20:55:56 2010 (r207296) @@ -207,7 +207,6 @@ octeon_led_write_hex(uint32_t wl) octeon_led_write_string(nbuf); } - /* * octeon_debug_symbol * @@ -418,11 +417,8 @@ static octeon_boot_descriptor_t *app_des #define OCTEON_BOARD_TYPE_SIM 1 #define OCTEON_BOARD_TYPE_CN3010_EVB_HS5 11 -#define OCTEON_CLOCK_MIN (100 * 1000 * 1000) -#define OCTEON_CLOCK_MAX (800 * 1000 * 1000) +#define OCTEON_CLOCK_DEFAULT (500 * 1000 * 1000) #define OCTEON_DRAM_DEFAULT (256 * 1024 * 1024) -#define OCTEON_DRAM_MIN 30 -#define OCTEON_DRAM_MAX 3000 int octeon_is_simulation(void) Modified: user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h ============================================================================== --- user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h Tue Apr 27 20:53:33 2010 (r207295) +++ user/jmallett/octeon/sys/mips/cavium/octeon_pcmap_regs.h Tue Apr 27 20:55:56 2010 (r207296) @@ -275,14 +275,6 @@ static inline void oct_write32 (uint64_t #define oct_readint32(a) ((int32_t)oct_read32((a))) -/* ------------------------------------------------------------------- * - * octeon_get_chipid() * - * ------------------------------------------------------------------- */ -#define OCTEON_CN31XX_CHIP 0x000d0100 -#define OCTEON_CN30XX_CHIP 0x000d0200 -#define OCTEON_CN3020_CHIP 0x000d0112 -#define OCTEON_CN5020_CHIP 0x000d0601 - /* * octeon_machdep.c * @@ -303,31 +295,9 @@ extern void octeon_ciu_reset(void); extern int octeon_is_simulation(void); #endif /* LOCORE */ - -#define OCTEON_CLOCK_DEFAULT (500 * 1000 * 1000) - /* * EBT3000 LED Unit */ #define OCTEON_CHAR_LED_BASE_ADDR (0x1d020000 | (0x1ffffffffull << 31)) -/* - * Physical Memory Banks - */ -/* 1st BANK */ -#define OCTEON_DRAM_FIRST_256_START 0x00000000ull -#define OCTEON_DRAM_FIRST_256_END (0x10000000ull - 1ull) -#define OCTEON_DRAM_RESERVED_END 0X1FFF000ULL /* 32 Meg Reserved for Mips Kernel MD Ops */ -#define OCTEON_DRAM_FIRST_BANK_SIZE (OCTEON_DRAM_FIRST_256_END - OCTEON_DRAM_FIRST_256_START + 1) - -/* 2nd BANK */ -#define OCTEON_DRAM_SECOND_256_START (0x0000000410000000ull) -#define OCTEON_DRAM_SECOND_256_END (0x0000000420000000ull - 1ull) /* Requires 64 bit paddr */ -#define OCTEON_DRAM_SECOND_BANK_SIZE (OCTEON_DRAM_SECOND_256_END - OCTEON_DRAM_SECOND_256_START + 1ull) - -/* 3rd BANK */ -#define OCTEON_DRAM_ABOVE_512_START 0x20000000ull -#define OCTEON_DRAM_ABOVE_512_END (0x0000000300000000ull - 1ull) /* To be calculated as remaining */ -#define OCTEON_DRAM_THIRD_BANK_SIZE (OCTEON_DRAM_ABOVE_512_END - OCTEON_DRAM_ABOVE_512_START + 1ull) - #endif /* !OCTEON_PCMAP_REGS_H__ */