From owner-p4-projects@FreeBSD.ORG Thu Jan 12 02:19:15 2006 Return-Path: X-Original-To: p4-projects@freebsd.org Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 3159916A422; Thu, 12 Jan 2006 02:19:15 +0000 (GMT) X-Original-To: perforce@freebsd.org Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 07AE916A41F for ; Thu, 12 Jan 2006 02:19:15 +0000 (GMT) (envelope-from cognet@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id B14C443D45 for ; Thu, 12 Jan 2006 02:19:14 +0000 (GMT) (envelope-from cognet@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.1/8.13.1) with ESMTP id k0C2JEZE050544 for ; Thu, 12 Jan 2006 02:19:14 GMT (envelope-from cognet@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.13.1/8.13.1/Submit) id k0C2JEhb050534 for perforce@freebsd.org; Thu, 12 Jan 2006 02:19:14 GMT (envelope-from cognet@freebsd.org) Date: Thu, 12 Jan 2006 02:19:14 GMT Message-Id: <200601120219.k0C2JEhb050534@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to cognet@freebsd.org using -f From: Olivier Houchard To: Perforce Change Reviews Cc: Subject: PERFORCE change 89540 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 Jan 2006 02:19:16 -0000 http://perforce.freebsd.org/chv.cgi?CH=89540 Change 89540 by cognet@cognet on 2006/01/12 02:18:12 - Manually disable interrupts by writing in the corresponding IDR for all devices that share the IRQ 1 (ST, DBGU, PIOA-PIOD, SDRAM controller, RTC). Without that, the first device that unmask the IRQ1 would provoke an interrupt storm. - Write in the end of interrupt register in arm_irq_unmask(). This is not the best place to do it, it should be done once we're done servicing interrupts, but it should be harmless. It makes interrupts work as expected (without it, we wouldn't get any interrupt after the first one). Affected files ... .. //depot/projects/arm/src/sys/arm/at91/at91.c#3 edit Differences ... ==== //depot/projects/arm/src/sys/arm/at91/at91.c#3 (text+ko) ==== @@ -255,6 +255,25 @@ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_IDCR, 0xffffffff); bus_space_write_4(sc->sc_st, sc->sc_sys_sh, IC_ICCR, 0xffffffff); + /* XXX */ + /* Disable all interrupts for RTC (0xe24 == RTC_IDR) */ + bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xe24, 0xffffffff); + /* Disable all interrupts for PMC (0xc64 == PMC_IDR) */ + bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xc64, 0xffffffff); + /* Disable all interrupts for ST */ + bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xd18, 0xffffffff); + /* DIsable all interrupts for DBGU */ + bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x20c, 0xffffffff); + /* Disable all interrupts for PIOA */ + bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x444, 0xffffffff); + /* Disable all interrupts for PIOB */ + bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x644, 0xffffffff); + /* Disable all interrupts for PIOC */ + bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0x844, 0xffffffff); + /* Disable all interrupts for PIOD */ + bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xa44, 0xffffffff); + /* Disable all interrupts for the SDRAM controller */ + bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xfa8, 0xffffffff); at91_add_child(dev, 0, "at91_st", 0, 0, 0, 1); at91_add_child(dev, 10, "at91_udp", 0, AT91RM92_BASE + // UDP AT91RM92_UDP_BASE, AT91RM92_UDP_SIZE, AT91RM92_IRQ_UDP); @@ -463,6 +482,8 @@ bus_space_write_4(at91_softc->sc_st, at91_softc->sc_sys_sh, IC_IECR, 1 << nb); + bus_space_write_4(at91_softc->sc_st, at91_softc->sc_sys_sh, + IC_EOICR, 0); }