From owner-svn-src-projects@FreeBSD.ORG Mon Sep 14 03:53:49 2009 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9696D1065672; Mon, 14 Sep 2009 03:53:49 +0000 (UTC) (envelope-from nwhitehorn@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 847018FC15; Mon, 14 Sep 2009 03:53:49 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n8E3rnL7039974; Mon, 14 Sep 2009 03:53:49 GMT (envelope-from nwhitehorn@svn.freebsd.org) Received: (from nwhitehorn@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n8E3rnQ9039970; Mon, 14 Sep 2009 03:53:49 GMT (envelope-from nwhitehorn@svn.freebsd.org) Message-Id: <200909140353.n8E3rnQ9039970@svn.freebsd.org> From: Nathan Whitehorn Date: Mon, 14 Sep 2009 03:53:48 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r197184 - in projects/ppc64/sys/powerpc: aim aim64 include X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 14 Sep 2009 03:53:49 -0000 Author: nwhitehorn Date: Mon Sep 14 03:53:48 2009 New Revision: 197184 URL: http://svn.freebsd.org/changeset/base/197184 Log: Fix some register sizes, and fix the cacheline size determination HID5 for G5s. This helps not mire us in an infinite nest of decrementer interrupts, which is always good, and gets the machine mounting root over NFS before dying. Remaining mysteries: 1. The 64-bit kernel sees the CPU tick almost exactly 3 times faster than the 32-bit kernel. This makes no sense. 2. There is some memory corruption associated with thread switching. Once the kernel is multithreaded, I get interesting errors like "corrupt spinlock" and miscellaneous assertion failures in random places. Modified: projects/ppc64/sys/powerpc/aim/clock.c projects/ppc64/sys/powerpc/aim/machdep.c projects/ppc64/sys/powerpc/aim64/machdep.c projects/ppc64/sys/powerpc/aim64/mmu_oea64.c projects/ppc64/sys/powerpc/include/cpufunc.h projects/ppc64/sys/powerpc/include/hid.h Modified: projects/ppc64/sys/powerpc/aim/clock.c ============================================================================== --- projects/ppc64/sys/powerpc/aim/clock.c Sun Sep 13 23:12:05 2009 (r197183) +++ projects/ppc64/sys/powerpc/aim/clock.c Mon Sep 14 03:53:48 2009 (r197184) @@ -95,8 +95,7 @@ static struct timecounter decr_timecount void decr_intr(struct trapframe *frame) { - long tick; - int nticks; + int32_t tick, nticks; /* * Check whether we are initialized. Modified: projects/ppc64/sys/powerpc/aim/machdep.c ============================================================================== --- projects/ppc64/sys/powerpc/aim/machdep.c Sun Sep 13 23:12:05 2009 (r197183) +++ projects/ppc64/sys/powerpc/aim/machdep.c Mon Sep 14 03:53:48 2009 (r197184) @@ -342,9 +342,9 @@ powerpc_init(u_int startkernel, u_int en case IBM970FX: case IBM970MP: case IBM970GX: - scratch = mfspr64upper(SPR_HID5,msr); + scratch = mfspr(SPR_HID5); scratch &= ~HID5_970_DCBZ_SIZE_HI; - mtspr64(SPR_HID5, scratch, mfspr(SPR_HID5), msr); + mtspr(SPR_HID5, scratch); break; } Modified: projects/ppc64/sys/powerpc/aim64/machdep.c ============================================================================== --- projects/ppc64/sys/powerpc/aim64/machdep.c Sun Sep 13 23:12:05 2009 (r197183) +++ projects/ppc64/sys/powerpc/aim64/machdep.c Mon Sep 14 03:53:48 2009 (r197184) @@ -334,7 +334,7 @@ powerpc_init(u_int startkernel, u_int en case IBM970MP: case IBM970GX: scratch = mfspr(SPR_HID5); - scratch &= ~((register_t)HID5_970_DCBZ_SIZE_HI << 32); + scratch &= ~HID5_970_DCBZ_SIZE_HI; mtspr(SPR_HID5, scratch); break; } @@ -825,7 +825,7 @@ cpu_halt(void) void cpu_idle(int busy) { - uint32_t msr; + register_t msr; msr = mfmsr(); Modified: projects/ppc64/sys/powerpc/aim64/mmu_oea64.c ============================================================================== --- projects/ppc64/sys/powerpc/aim64/mmu_oea64.c Sun Sep 13 23:12:05 2009 (r197183) +++ projects/ppc64/sys/powerpc/aim64/mmu_oea64.c Mon Sep 14 03:53:48 2009 (r197184) @@ -759,7 +759,7 @@ moea64_bridge_bootstrap(mmu_t mmup, vm_o int ofw_mappings; vm_size_t size, physsz, hwphyssz; vm_offset_t pa, va, off; - uint32_t msr; + register_t msr; void *dpcpu; /* We don't have a direct map since there is no BAT */ Modified: projects/ppc64/sys/powerpc/include/cpufunc.h ============================================================================== --- projects/ppc64/sys/powerpc/include/cpufunc.h Sun Sep 13 23:12:05 2009 (r197183) +++ projects/ppc64/sys/powerpc/include/cpufunc.h Mon Sep 14 03:53:48 2009 (r197184) @@ -68,6 +68,15 @@ mtmsr(register_t value) __asm __volatile ("mtmsr %0; isync" :: "r"(value)); } +#ifdef __powerpc64__ +static __inline void +mtmsrd(register_t value) +{ + + __asm __volatile ("mtmsrd %0; isync" :: "r"(value)); +} +#endif + static __inline register_t mfmsr(void) { @@ -78,6 +87,7 @@ mfmsr(void) return (value); } +#ifndef __powerpc64__ static __inline void mtsrin(vm_offset_t va, register_t value) { @@ -94,6 +104,7 @@ mfsrin(vm_offset_t va) return (value); } +#endif static __inline void mtdec(register_t value) @@ -126,6 +137,9 @@ static __inline u_quad_t mftb(void) { u_quad_t tb; + #ifdef __powerpc64__ + __asm __volatile ("mftb %0" : "=r"(tb)); + #else uint32_t *tbup = (uint32_t *)&tb; uint32_t *tblp = tbup + 1; @@ -133,6 +147,7 @@ mftb(void) *tbup = mfspr(TBR_TBU); *tblp = mfspr(TBR_TBL); } while (*tbup != mfspr(TBR_TBU)); + #endif return (tb); } Modified: projects/ppc64/sys/powerpc/include/hid.h ============================================================================== --- projects/ppc64/sys/powerpc/include/hid.h Sun Sep 13 23:12:05 2009 (r197183) +++ projects/ppc64/sys/powerpc/include/hid.h Mon Sep 14 03:53:48 2009 (r197184) @@ -154,6 +154,6 @@ #define HID0_E500_DEFAULT_SET (HID0_EMCP | HID0_E500_TBEN) #define HID1_E500_DEFAULT_SET (HID1_E500_ABE | HID1_E500_ASTME) -#define HID5_970_DCBZ_SIZE_HI 0x01000000 /* dcbz does a 32-byte store */ +#define HID5_970_DCBZ_SIZE_HI 0x00000080UL /* dcbz does a 32-byte store */ #endif /* _POWERPC_HID_H_ */