From owner-freebsd-arm@FreeBSD.ORG Thu Sep 19 16:48:04 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id AB9E37CD for ; Thu, 19 Sep 2013 16:48:04 +0000 (UTC) (envelope-from rrs@lakerest.net) Received: from lakerest.net (lakerest.net [70.155.160.98]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 2F2042A80 for ; Thu, 19 Sep 2013 16:48:03 +0000 (UTC) Received: from [10.1.1.103] (bsd4.lakerest.net [70.155.160.102]) (authenticated bits=0) by lakerest.net (8.14.4/8.14.3) with ESMTP id r8JGm2I4055169 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NOT) for ; Thu, 19 Sep 2013 12:48:02 -0400 (EDT) (envelope-from rrs@lakerest.net) From: Randall Stewart Content-Type: multipart/mixed; boundary="Apple-Mail=_176D3252-AA19-42AA-83F9-2E5C693C5801" Subject: dream plug patch to get right power management Date: Thu, 19 Sep 2013 12:48:02 -0400 Message-Id: To: ARM Mime-Version: 1.0 (Apple Message framework v1283) X-Mailer: Apple Mail (2.1283) X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 19 Sep 2013 16:48:04 -0000 --Apple-Mail=_176D3252-AA19-42AA-83F9-2E5C693C5801 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset=us-ascii All: Here is the patch I am considering putting in I guess after the freeze. This corrects it so the kirkwood chip uses the right register for the power management lookups. Comments? R --Apple-Mail=_176D3252-AA19-42AA-83F9-2E5C693C5801 Content-Disposition: attachment; filename=arm_patch.txt Content-Type: text/plain; x-unix-mode=0644; name="arm_patch.txt" Content-Transfer-Encoding: 7bit Index: arm/mv/common.c =================================================================== --- arm/mv/common.c (revision 255614) +++ arm/mv/common.c (working copy) @@ -153,8 +153,11 @@ struct fdt_pm_mask_entry fdt_pm_mask_table[] = { static __inline int pm_is_disabled(uint32_t mask) { - +#if defined(SOC_MV_KIRKWOOD) + return (soc_power_ctrl_get(mask) == mask); +#else return (soc_power_ctrl_get(mask) == mask ? 0 : 1); +#endif } /* @@ -221,7 +224,16 @@ fdt_pm(phandle_t node) continue; compat = fdt_is_compatible(node, fdt_pm_mask_table[i].compat); - +#if defined(SOC_MV_KIRKWOOD) + if (compat && (cpu_pm_ctrl & fdt_pm_mask_table[i].mask)) { + dev_mask |= (1 << i); + ena = 0; + break; + } else if (compat) { + dev_mask |= (1 << i); + break; + } +#else if (compat && (~cpu_pm_ctrl & fdt_pm_mask_table[i].mask)) { dev_mask |= (1 << i); ena = 0; @@ -230,6 +242,7 @@ fdt_pm(phandle_t node) dev_mask |= (1 << i); break; } +#endif } return (ena); Index: arm/mv/mvreg.h =================================================================== --- arm/mv/mvreg.h (revision 255614) +++ arm/mv/mvreg.h (working copy) @@ -142,7 +142,11 @@ /* * Power Control */ +#if defined(SOC_MV_KIRKWOOD) +#define CPU_PM_CTRL 0x18 +#else #define CPU_PM_CTRL 0x1C +#endif #define CPU_PM_CTRL_NONE 0 #define CPU_PM_CTRL_ALL ~0x0 Index: dev/cesa/cesa.c =================================================================== --- dev/cesa/cesa.c (revision 255614) +++ dev/cesa/cesa.c (working copy) @@ -997,11 +997,17 @@ cesa_attach(device_t dev) sc->sc_dev = dev; /* Check if CESA peripheral device has power turned on */ +#if defined(SOC_MV_KIRKWOOD) + if (soc_power_ctrl_get(CPU_PM_CTRL_CRYPTO) == CPU_PM_CTRL_CRYPTO) { + device_printf(dev, "not powered on\n"); + return (ENXIO); + } +#else if (soc_power_ctrl_get(CPU_PM_CTRL_CRYPTO) != CPU_PM_CTRL_CRYPTO) { device_printf(dev, "not powered on\n"); return (ENXIO); } - +#endif soc_id(&d, &r); switch (d) { --Apple-Mail=_176D3252-AA19-42AA-83F9-2E5C693C5801 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset=us-ascii ------------------------------ Randall Stewart 803-317-4952 (cell) --Apple-Mail=_176D3252-AA19-42AA-83F9-2E5C693C5801--