From owner-svn-src-all@freebsd.org Sat Jan 2 18:10:55 2016 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 3720BA5F25B; Sat, 2 Jan 2016 18:10:55 +0000 (UTC) (envelope-from nwhitehorn@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 032DF18AC; Sat, 2 Jan 2016 18:10:54 +0000 (UTC) (envelope-from nwhitehorn@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u02IAs56057789; Sat, 2 Jan 2016 18:10:54 GMT (envelope-from nwhitehorn@FreeBSD.org) Received: (from nwhitehorn@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u02IArou057787; Sat, 2 Jan 2016 18:10:53 GMT (envelope-from nwhitehorn@FreeBSD.org) Message-Id: <201601021810.u02IArou057787@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: nwhitehorn set sender to nwhitehorn@FreeBSD.org using -f From: Nathan Whitehorn Date: Sat, 2 Jan 2016 18:10:53 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r293051 - head/sys/powerpc/aim X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 02 Jan 2016 18:10:55 -0000 Author: nwhitehorn Date: Sat Jan 2 18:10:53 2016 New Revision: 293051 URL: https://svnweb.freebsd.org/changeset/base/293051 Log: Switch setting MSR[SF] to C code. This removes any CPU-specific code (MSF[SF] is a Book 3-S thing) in the 64-bit locore64.S. Modified: head/sys/powerpc/aim/aim_machdep.c head/sys/powerpc/aim/locore64.S Modified: head/sys/powerpc/aim/aim_machdep.c ============================================================================== --- head/sys/powerpc/aim/aim_machdep.c Sat Jan 2 17:14:22 2016 (r293050) +++ head/sys/powerpc/aim/aim_machdep.c Sat Jan 2 18:10:53 2016 (r293051) @@ -179,6 +179,17 @@ aim_cpu_init(vm_offset_t toc) trap_offset = 0; cacheline_warn = 0; + #ifdef __powerpc64__ + /* + * Switch to 64-bit mode, if the bootloader didn't, before we start + * using memory beyond what the bootloader might have set up. + * Guaranteed not to cause an implicit branch since we either (a) + * started with a 32-bit bootloader below 4 GB or (b) were already in + * 64-bit mode, making this a no-op. + */ + mtmsrd(mfmsr() | PSL_SF); + #endif + /* Various very early CPU fix ups */ switch (mfpvr() >> 16) { /* Modified: head/sys/powerpc/aim/locore64.S ============================================================================== --- head/sys/powerpc/aim/locore64.S Sat Jan 2 17:14:22 2016 (r293050) +++ head/sys/powerpc/aim/locore64.S Sat Jan 2 18:10:53 2016 (r293051) @@ -157,13 +157,6 @@ ASENTRY_NOPROF(__start) ld %r5,64(%r1) ld %r6,72(%r1) - /* Switch to 64-bit mode */ - mfmsr %r9 - li %r8,1 - insrdi %r9,%r8,1,0 - mtmsrd %r9 - isync - /* Begin CPU init */ mr %r4,%r2 /* Replace ignored r4 with tocbase for trap handlers */ bl powerpc_init