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Date: Thu, 14 Aug 2008 09:37:32 +0900
From: "Byong-Soo Jeong" <knightjbs@gmail.com>
To: freebsd-cvsweb@FreeBSD.org
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Subject: Please check some File Downloading Error
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Dear Webmaster.

I was searching some IP and in OPENCORES.ORG, I've found it.
In that directory, the source code described in verilog can be download, but
the ppt file that explain how to operating the file and how to behave that
module was error.
So, please check the file.

On the site - CODE(CVS) - rs_5_3_gf256/doc/ - Reed Solomon (5,3) Coder.ppt

I'll wait a good news from you.
Thank you.


-- 
Patrick Jeong
E-mail : knightjbs@gmail.com
Mobile : +82-11-9303-6953
Office : +82-52-288-7550
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