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From: Doug Barton <dougb@FreeBSD.org>
Date: Thu, 25 Jun 2009 19:52:45 +0000 (UTC)
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Subject: svn commit: r195000 - head/contrib/bind9/lib/isc/ia64/include/isc
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Author: dougb
Date: Thu Jun 25 19:52:45 2009
New Revision: 195000
URL: http://svn.freebsd.org/changeset/base/195000

Log:
  This is the solution that ISC committed after 9.6.1-release for
  the gcc warning issue. It should be included in the next upstream
  release.

Modified:
  head/contrib/bind9/lib/isc/ia64/include/isc/atomic.h

Modified: head/contrib/bind9/lib/isc/ia64/include/isc/atomic.h
==============================================================================
--- head/contrib/bind9/lib/isc/ia64/include/isc/atomic.h	Thu Jun 25 19:39:16 2009	(r194999)
+++ head/contrib/bind9/lib/isc/ia64/include/isc/atomic.h	Thu Jun 25 19:52:45 2009	(r195000)
@@ -31,6 +31,9 @@
  * (e.g., 1 and -1)?
  */
 static inline isc_int32_t
+#ifdef __GNUC__
+__attribute__ ((unused))
+#endif
 isc_atomic_xadd(isc_int32_t *p, isc_int32_t val)
 {
 	isc_int32_t prev, swapped;
@@ -54,6 +57,9 @@ isc_atomic_xadd(isc_int32_t *p, isc_int3
  * This routine atomically stores the value 'val' in 'p'.
  */
 static inline void
+#ifdef __GNUC__
+__attribute__ ((unused))
+#endif
 isc_atomic_store(isc_int32_t *p, isc_int32_t val)
 {
 	__asm__ volatile(
@@ -70,6 +76,9 @@ isc_atomic_store(isc_int32_t *p, isc_int
  * case.
  */
 static inline isc_int32_t
+#ifdef __GNUC__
+__attribute__ ((unused))
+#endif
 isc_atomic_cmpxchg(isc_int32_t *p, isc_int32_t cmpval, isc_int32_t val)
 {
 	isc_int32_t ret;