From owner-soc-status@FreeBSD.ORG Sat Jun 7 21:38:02 2014 Return-Path: Delivered-To: soc-status@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 82BAAFA5 for ; Sat, 7 Jun 2014 21:38:02 +0000 (UTC) Received: from mail-qa0-x231.google.com (mail-qa0-x231.google.com [IPv6:2607:f8b0:400d:c00::231]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 45BBD248A for ; Sat, 7 Jun 2014 21:38:02 +0000 (UTC) Received: by mail-qa0-f49.google.com with SMTP id cm18so6080208qab.8 for ; Sat, 07 Jun 2014 14:38:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :content-type; bh=NBfTfjwOrzizHo4e54N1ix+0kRD4STC25E/Zud35Y7U=; b=DGKfNR0mixYVxxswzfcoHT3qIAREILS90y0088E/1N0w5plH9ndjvRxMU/X82FcbGw dLBqL34Mih1T8NUN+0Fioia1mkzpSzZgRczLH1PHdj4jjWcXBk/8WaHSmP0eQD9FqnjV tjOB5xZ9okpkWMWbkodDo4XjOshfUQ5bZSvvjenfIYy2kvqn81SNeITfaF4ZtigkioHs 0gI+6wgjLuLK2KtXyQWEa8aOvS3HVIQbqGBb3M1DUlPZzaKI22EGCuzKoTTkIknGNVkA 4iLQUkJINtPEtMl4II9tCqNEnJvnTj6wetXQ8vPyFVDnR1X3XljkE67Rbpm5gqJhQ+8U rlZA== MIME-Version: 1.0 X-Received: by 10.224.52.6 with SMTP id f6mr20698722qag.63.1402177081245; Sat, 07 Jun 2014 14:38:01 -0700 (PDT) Received: by 10.140.47.68 with HTTP; Sat, 7 Jun 2014 14:38:01 -0700 (PDT) In-Reply-To: References: Date: Sun, 8 Jun 2014 00:38:01 +0300 Message-ID: Subject: Re: [GSOC] bhyve instruction caching From: Mihai Carabas To: soc-status@freebsd.org Content-Type: text/plain; charset=UTF-8 X-BeenThere: soc-status@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Summer of Code Status Reports and Discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 07 Jun 2014 21:38:02 -0000 > > These days I've started a discussion with Neel about some > microbenchmarking mechanisms. I will come with some more details next > week. I've built a microbenchmarking kernel module which is accessing the lapic->id for 1000000 and than I calculate the average of an access (each access needs to be emulated by the hypervisor). I've also implemented the instuction caching mechanism. At each emulation: - I check to see if I have that particular instruction cached - if not I will cache it in a particula structure named "struct vie_cached" [1] - if it's cached I just use that instruction Right now I am working on write-protecting the pages where the instruction reside. I will come with some more details/results when I finished this part too (there are some SMP issues I'm still debating with Neel). [1] https://socsvn.freebsd.org/socsvn/soc2014/mihai/bhyve-icache-head/sys/amd64/vmm/vmm_instruction_cache.c [2] https://socsvn.freebsd.org/socsvn/soc2014/mihai/lapic_test/lapic_test.c Thanks, Mihai