Date: Tue, 15 Apr 2008 08:59:41 -0500 From: Derek Ragona <derek@computinginnovations.com> To: Jeff Roberson <jroberson@jroberson.net>, gnn@freebsd.org Cc: Andrew Gallatin <gallatin@cs.duke.edu>, current@freebsd.org Subject: Re: TSC Timecounter and multi-core/SMP Message-ID: <6.0.0.22.2.20080415085657.024e89d0@mail.computinginnovations.com> In-Reply-To: <20080414215057.B959@desktop> References: <m2d4oy8n30.wl%gnn@neville-neil.com> <18431.23276.913397.188219@grasshopper.cs.duke.edu> <m27iezwonx.wl%gnn@neville-neil.com> <20080414215057.B959@desktop>
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At 02:51 AM 4/15/2008, Jeff Roberson wrote: >On Tue, 15 Apr 2008, gnn@freebsd.org wrote: > >>At Fri, 11 Apr 2008 08:34:29 -0400 (EDT), >>Andrew Gallatin wrote: >>> >>> >>>gnn@freebsd.org writes: >>> > Howdy, >>> > >>> > Is the TSC timecounter synchronized across multiple cores and/or >>> > processors? A quick search seems to indicate it's not but I'd like to >>> > find a definitive reference on the TSC. >>> >>>There is a great comment in the OpenSolaris source code talking about >>>TSCs and their behavior on SMP systems. See >>>http://cvs.opensolaris.org/source/xref/onnv/onnv-gate/usr/src/uts/i86pc/os/timestamp.c >> >>Actually this was a very helpful bit of reading. >> >>I also believe that at least per processor there is only 1 TSC, that >>is, on a 2 or 4 core, all cores share the same TSC. > >I think we should confirm whether this is the case with earlier opterson. >I have seen two processors on the same die out of sync. > >Jeff I have seen proposed new CPU designs will have the separate cores independently clocked. It will be another extension of power management to enable cores to "sleep" if not needed, also to allow each core to run at different clocks to allow better heat and power management. -Derek -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean.
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