From owner-svn-src-all@FreeBSD.ORG Wed Aug 15 03:03:04 2012 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 2B709106564A; Wed, 15 Aug 2012 03:03:04 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id B9A728FC14; Wed, 15 Aug 2012 03:03:03 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q7F3331B090696; Wed, 15 Aug 2012 03:03:03 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q7F3336I090690; Wed, 15 Aug 2012 03:03:03 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <201208150303.q7F3336I090690@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Wed, 15 Aug 2012 03:03:03 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r239268 - in head/sys: arm/arm arm/at91 arm/econa arm/include arm/s3c2xx0 arm/sa11x0 arm/xscale arm/xscale/i80321 arm/xscale/i8134x arm/xscale/ixp425 arm/xscale/pxa conf X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Aug 2012 03:03:04 -0000 Author: gonzo Date: Wed Aug 15 03:03:03 2012 New Revision: 239268 URL: http://svn.freebsd.org/changeset/base/239268 Log: Merging projects/armv6, part 1 Cummulative patch of changes that are not vendor-specific: - ARMv6 and ARMv7 architecture support - ARM SMP support - VFP/Neon support - ARM Generic Interrupt Controller driver - Simplification of startup code for all platforms Added: head/sys/arm/arm/busdma_machdep-v6.c (contents, props changed) head/sys/arm/arm/cpufunc_asm_armv7.S (contents, props changed) head/sys/arm/arm/cpufunc_asm_pj4b.S (contents, props changed) head/sys/arm/arm/gic.c (contents, props changed) head/sys/arm/arm/mp_machdep.c (contents, props changed) head/sys/arm/arm/mpcore_timer.c (contents, props changed) head/sys/arm/arm/pl310.c (contents, props changed) head/sys/arm/arm/pmap-v6.c (contents, props changed) head/sys/arm/arm/vfp.c (contents, props changed) head/sys/arm/include/pl310.h (contents, props changed) head/sys/arm/include/vfp.h (contents, props changed) Modified: head/sys/arm/arm/bcopyinout.S head/sys/arm/arm/bcopyinout_xscale.S head/sys/arm/arm/bus_space_asm_generic.S head/sys/arm/arm/copystr.S head/sys/arm/arm/cpufunc.c head/sys/arm/arm/cpufunc_asm.S head/sys/arm/arm/cpufunc_asm_arm11.S head/sys/arm/arm/elf_trampoline.c head/sys/arm/arm/fusu.S head/sys/arm/arm/genassym.c head/sys/arm/arm/identcpu.c head/sys/arm/arm/locore.S head/sys/arm/arm/machdep.c head/sys/arm/arm/pmap.c head/sys/arm/arm/swtch.S head/sys/arm/arm/sys_machdep.c head/sys/arm/arm/undefined.c head/sys/arm/arm/vm_machdep.c head/sys/arm/at91/at91_machdep.c head/sys/arm/at91/std.at91 head/sys/arm/econa/econa_machdep.c head/sys/arm/econa/std.econa head/sys/arm/include/armreg.h head/sys/arm/include/asm.h head/sys/arm/include/asmacros.h head/sys/arm/include/atomic.h head/sys/arm/include/cpuconf.h head/sys/arm/include/cpufunc.h head/sys/arm/include/fp.h head/sys/arm/include/intr.h head/sys/arm/include/md_var.h head/sys/arm/include/param.h head/sys/arm/include/pcb.h head/sys/arm/include/pcpu.h head/sys/arm/include/pmap.h head/sys/arm/include/pte.h head/sys/arm/include/smp.h head/sys/arm/include/sysarch.h head/sys/arm/include/vmparam.h head/sys/arm/s3c2xx0/s3c24x0_machdep.c head/sys/arm/s3c2xx0/std.ln2410sbc head/sys/arm/s3c2xx0/std.s3c2410 head/sys/arm/sa11x0/assabet_machdep.c head/sys/arm/sa11x0/std.sa11x0 head/sys/arm/xscale/i80321/ep80219_machdep.c head/sys/arm/xscale/i80321/iq31244_machdep.c head/sys/arm/xscale/i8134x/crb_machdep.c head/sys/arm/xscale/ixp425/avila_machdep.c head/sys/arm/xscale/pxa/pxa_machdep.c head/sys/arm/xscale/std.xscale head/sys/conf/Makefile.arm head/sys/conf/files.arm head/sys/conf/options.arm Modified: head/sys/arm/arm/bcopyinout.S ============================================================================== --- head/sys/arm/arm/bcopyinout.S Wed Aug 15 02:42:09 2012 (r239267) +++ head/sys/arm/arm/bcopyinout.S Wed Aug 15 03:03:03 2012 (r239268) @@ -54,14 +54,19 @@ __FBSDID("$FreeBSD$"); .text .align 0 -#ifdef MULTIPROCESSOR -.Lcpu_info: - .word _C_LABEL(cpu_info) +#ifdef _ARM_ARCH_6 +#define GET_PCB(tmp) \ + mrc p15, 0, tmp, c13, c0, 4; \ + add tmp, tmp, #(PC_CURPCB) #else .Lcurpcb: - .word _C_LABEL(__pcpu) + PC_CURPCB + .word _C_LABEL(__pcpu) + PC_CURPCB + +#define GET_PCB(tmp) \ + ldr tmp, .Lcurpcb #endif + #define SAVE_REGS stmfd sp!, {r4-r11} #define RESTORE_REGS ldmfd sp!, {r4-r11} @@ -111,18 +116,9 @@ ENTRY(copyin) .Lnormal: SAVE_REGS -#ifdef MULTIPROCESSOR - /* XXX Probably not appropriate for non-Hydra SMPs */ - stmfd sp!, {r0-r2, r14} - bl _C_LABEL(cpu_number) - ldr r4, .Lcpu_info - ldr r4, [r4, r0, lsl #2] - ldr r4, [r4, #CI_CURPCB] - ldmfd sp!, {r0-r2, r14} -#else - ldr r4, .Lcurpcb + GET_PCB(r4) ldr r4, [r4] -#endif + ldr r5, [r4, #PCB_ONFAULT] adr r3, .Lcopyfault @@ -357,18 +353,8 @@ ENTRY(copyout) .Lnormale: SAVE_REGS -#ifdef MULTIPROCESSOR - /* XXX Probably not appropriate for non-Hydra SMPs */ - stmfd sp!, {r0-r2, r14} - bl _C_LABEL(cpu_number) - ldr r4, .Lcpu_info - ldr r4, [r4, r0, lsl #2] - ldr r4, [r4, #CI_CURPCB] - ldmfd sp!, {r0-r2, r14} -#else - ldr r4, .Lcurpcb + GET_PCB(r4) ldr r4, [r4] -#endif ldr r5, [r4, #PCB_ONFAULT] adr r3, .Lcopyfault @@ -561,18 +547,9 @@ ENTRY(copyout) * else EFAULT if a page fault occurred. */ ENTRY(badaddr_read_1) -#ifdef MULTIPROCESSOR - /* XXX Probably not appropriate for non-Hydra SMPs */ - stmfd sp!, {r0-r1, r14} - bl _C_LABEL(cpu_number) - ldr r2, .Lcpu_info - ldr r2, [r2, r0, lsl #2] - ldr r2, [r2, #CI_CURPCB] - ldmfd sp!, {r0-r1, r14} -#else - ldr r2, .Lcurpcb + GET_PCB(r2) ldr r2, [r2] -#endif + ldr ip, [r2, #PCB_ONFAULT] adr r3, 1f str r3, [r2, #PCB_ONFAULT] @@ -595,18 +572,9 @@ ENTRY(badaddr_read_1) * else EFAULT if a page fault occurred. */ ENTRY(badaddr_read_2) -#ifdef MULTIPROCESSOR - /* XXX Probably not appropriate for non-Hydra SMPs */ - stmfd sp!, {r0-r1, r14} - bl _C_LABEL(cpu_number) - ldr r2, .Lcpu_info - ldr r2, [r2, r0, lsl #2] - ldr r2, [r2, #CI_CURPCB] - ldmfd sp!, {r0-r1, r14} -#else - ldr r2, .Lcurpcb + GET_PCB(r2) ldr r2, [r2] -#endif + ldr ip, [r2, #PCB_ONFAULT] adr r3, 1f str r3, [r2, #PCB_ONFAULT] @@ -629,18 +597,9 @@ ENTRY(badaddr_read_2) * else EFAULT if a page fault occurred. */ ENTRY(badaddr_read_4) -#ifdef MULTIPROCESSOR - /* XXX Probably not appropriate for non-Hydra SMPs */ - stmfd sp!, {r0-r1, r14} - bl _C_LABEL(cpu_number) - ldr r2, .Lcpu_info - ldr r2, [r2, r0, lsl #2] - ldr r2, [r2, #CI_CURPCB] - ldmfd sp!, {r0-r1, r14} -#else - ldr r2, .Lcurpcb + GET_PCB(r2) ldr r2, [r2] -#endif + ldr ip, [r2, #PCB_ONFAULT] adr r3, 1f str r3, [r2, #PCB_ONFAULT] Modified: head/sys/arm/arm/bcopyinout_xscale.S ============================================================================== --- head/sys/arm/arm/bcopyinout_xscale.S Wed Aug 15 02:42:09 2012 (r239267) +++ head/sys/arm/arm/bcopyinout_xscale.S Wed Aug 15 03:03:03 2012 (r239268) @@ -41,12 +41,15 @@ __FBSDID("$FreeBSD$"); .text .align 0 -#ifdef MULTIPROCESSOR -.Lcpu_info: - .word _C_LABEL(cpu_info) +#ifdef _ARM_ARCH_6 +#define GET_PCB(tmp) \ + mrc p15, 0, tmp, c13, c0, 4; \ + add tmp, tmp, #(PC_CURPCB) #else .Lcurpcb: .word _C_LABEL(__pcpu) + PC_CURPCB +#define GET_PCB(tmp) \ + ldr tmp, .Lcurpcb #endif /* @@ -85,18 +88,8 @@ ENTRY(copyin) .Lnormal: stmfd sp!, {r10-r11, lr} -#ifdef MULTIPROCESSOR - /* XXX Probably not appropriate for non-Hydra SMPs */ - stmfd sp!, {r0-r2} - bl _C_LABEL(cpu_number) - ldr r10, .Lcpu_info - ldmfd sp!, {r0-r2} - ldr r10, [r10, r0, lsl #2] - ldr r10, [r10, #CI_CURPCB] -#else - ldr r10, .Lcurpcb + GET_PCB(r10) ldr r10, [r10] -#endif mov r3, #0x00 adr ip, .Lcopyin_fault @@ -537,18 +530,8 @@ ENTRY(copyout) .Lnormale: stmfd sp!, {r10-r11, lr} -#ifdef MULTIPROCESSOR - /* XXX Probably not appropriate for non-Hydra SMPs */ - stmfd sp!, {r0-r2} - bl _C_LABEL(cpu_number) - ldr r10, .Lcpu_info - ldmfd sp!, {r0-r2} - ldr r10, [r10, r0, lsl #2] - ldr r10, [r10, #CI_CURPCB] -#else - ldr r10, .Lcurpcb + GET_PCB(r10) ldr r10, [r10] -#endif mov r3, #0x00 adr ip, .Lcopyout_fault Modified: head/sys/arm/arm/bus_space_asm_generic.S ============================================================================== --- head/sys/arm/arm/bus_space_asm_generic.S Wed Aug 15 02:42:09 2012 (r239267) +++ head/sys/arm/arm/bus_space_asm_generic.S Wed Aug 15 03:03:03 2012 (r239268) @@ -51,11 +51,9 @@ ENTRY(generic_bs_r_1) ldrb r0, [r1, r2] RET -#if (ARM_ARCH_4 + ARM_ARCH_5) > 0 ENTRY(generic_armv4_bs_r_2) ldrh r0, [r1, r2] RET -#endif ENTRY(generic_bs_r_4) ldr r0, [r1, r2] @@ -69,11 +67,9 @@ ENTRY(generic_bs_w_1) strb r3, [r1, r2] RET -#if (ARM_ARCH_4 + ARM_ARCH_5) > 0 ENTRY(generic_armv4_bs_w_2) strh r3, [r1, r2] RET -#endif ENTRY(generic_bs_w_4) str r3, [r1, r2] @@ -97,7 +93,6 @@ ENTRY(generic_bs_rm_1) RET -#if (ARM_ARCH_4 + ARM_ARCH_5) > 0 ENTRY(generic_armv4_bs_rm_2) add r0, r1, r2 mov r1, r3 @@ -111,7 +106,6 @@ ENTRY(generic_armv4_bs_rm_2) bne 1b RET -#endif ENTRY(generic_bs_rm_4) add r0, r1, r2 @@ -145,7 +139,6 @@ ENTRY(generic_bs_wm_1) RET -#if (ARM_ARCH_4 + ARM_ARCH_5) > 0 ENTRY(generic_armv4_bs_wm_2) add r0, r1, r2 mov r1, r3 @@ -159,7 +152,6 @@ ENTRY(generic_armv4_bs_wm_2) bne 1b RET -#endif ENTRY(generic_bs_wm_4) add r0, r1, r2 @@ -193,7 +185,6 @@ ENTRY(generic_bs_rr_1) RET -#if (ARM_ARCH_4 + ARM_ARCH_5) > 0 ENTRY(generic_armv4_bs_rr_2) add r0, r1, r2 mov r1, r3 @@ -207,7 +198,6 @@ ENTRY(generic_armv4_bs_rr_2) bne 1b RET -#endif ENTRY(generic_bs_rr_4) add r0, r1, r2 @@ -241,7 +231,6 @@ ENTRY(generic_bs_wr_1) RET -#if (ARM_ARCH_4 + ARM_ARCH_5) > 0 ENTRY(generic_armv4_bs_wr_2) add r0, r1, r2 mov r1, r3 @@ -255,7 +244,6 @@ ENTRY(generic_armv4_bs_wr_2) bne 1b RET -#endif ENTRY(generic_bs_wr_4) add r0, r1, r2 @@ -288,7 +276,6 @@ ENTRY(generic_bs_sr_1) RET -#if (ARM_ARCH_4 + ARM_ARCH_5) > 0 ENTRY(generic_armv4_bs_sr_2) add r0, r1, r2 mov r1, r3 @@ -301,7 +288,6 @@ ENTRY(generic_armv4_bs_sr_2) bne 1b RET -#endif ENTRY(generic_bs_sr_4) add r0, r1, r2 @@ -320,7 +306,6 @@ ENTRY(generic_bs_sr_4) * copy region */ -#if (ARM_ARCH_4 + ARM_ARCH_5) > 0 ENTRY(generic_armv4_bs_c_2) add r0, r1, r2 ldr r2, [sp, #0] @@ -350,4 +335,3 @@ ENTRY(generic_armv4_bs_c_2) bne 3b RET -#endif Added: head/sys/arm/arm/busdma_machdep-v6.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/arm/arm/busdma_machdep-v6.c Wed Aug 15 03:03:03 2012 (r239268) @@ -0,0 +1,1559 @@ +/*- + * Copyright (c) 2010 Mark Tinguely + * Copyright (c) 2004 Olivier Houchard + * Copyright (c) 2002 Peter Grehan + * Copyright (c) 1997, 1998 Justin T. Gibbs. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions, and the following disclaimer, + * without modification, immediately at the beginning of the file. + * 2. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * From i386/busdma_machdep.c 191438 2009-04-23 20:24:19Z jhb + */ + +#include +__FBSDID("$FreeBSD$"); + +#define _ARM32_BUS_DMA_PRIVATE +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include +#include +#include + +#define MAX_BPAGES 64 +#define BUS_DMA_COULD_BOUNCE BUS_DMA_BUS3 +#define BUS_DMA_MIN_ALLOC_COMP BUS_DMA_BUS4 + +#define FIX_DMAP_BUS_DMASYNC_POSTREAD + +struct bounce_zone; + +struct bus_dma_tag { + bus_dma_tag_t parent; + bus_size_t alignment; + bus_size_t boundary; + bus_addr_t lowaddr; + bus_addr_t highaddr; + bus_dma_filter_t *filter; + void *filterarg; + bus_size_t maxsize; + u_int nsegments; + bus_size_t maxsegsz; + int flags; + int ref_count; + int map_count; + bus_dma_lock_t *lockfunc; + void *lockfuncarg; + bus_dma_segment_t *segments; + struct bounce_zone *bounce_zone; + /* + * DMA range for this tag. If the page doesn't fall within + * one of these ranges, an error is returned. The caller + * may then decide what to do with the transfer. If the + * range pointer is NULL, it is ignored. + */ + struct arm32_dma_range *ranges; + int _nranges; + +}; + +struct bounce_page { + vm_offset_t vaddr; /* kva of bounce buffer */ + bus_addr_t busaddr; /* Physical address */ + vm_offset_t datavaddr; /* kva of client data */ + bus_size_t datacount; /* client data count */ + STAILQ_ENTRY(bounce_page) links; +}; + +struct sync_list { + vm_offset_t vaddr; /* kva of bounce buffer */ + bus_addr_t busaddr; /* Physical address */ + bus_size_t datacount; /* client data count */ + STAILQ_ENTRY(sync_list) slinks; +}; + +int busdma_swi_pending; + +struct bounce_zone { + STAILQ_ENTRY(bounce_zone) links; + STAILQ_HEAD(bp_list, bounce_page) bounce_page_list; + int total_bpages; + int free_bpages; + int reserved_bpages; + int active_bpages; + int total_bounced; + int total_deferred; + int map_count; + bus_size_t alignment; + bus_addr_t lowaddr; + char zoneid[8]; + char lowaddrid[20]; + struct sysctl_ctx_list sysctl_tree; + struct sysctl_oid *sysctl_tree_top; +}; + +static struct mtx bounce_lock; +static int total_bpages; +static int busdma_zonecount; +static STAILQ_HEAD(, bounce_zone) bounce_zone_list; + +SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters"); +SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0, + "Total bounce pages"); + +struct bus_dmamap { + struct bp_list bpages; + int pagesneeded; + int pagesreserved; + bus_dma_tag_t dmat; + void *buf; /* unmapped buffer pointer */ + bus_size_t buflen; /* unmapped buffer length */ + pmap_t pmap; + bus_dmamap_callback_t *callback; + void *callback_arg; + STAILQ_ENTRY(bus_dmamap) links; + STAILQ_HEAD(,sync_list) slist; +}; + +static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist; +static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist; + +static void init_bounce_pages(void *dummy); +static int alloc_bounce_zone(bus_dma_tag_t dmat); +static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages); +static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, + int commit); +static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, + vm_offset_t vaddr, bus_size_t size); +static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage); +int run_filter(bus_dma_tag_t dmat, bus_addr_t paddr); +static int _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, + void *buf, bus_size_t buflen, int flags); + +static __inline int +_bus_dma_can_bounce(vm_offset_t lowaddr, vm_offset_t highaddr) +{ + int i; + for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) { + if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1]) + || (lowaddr < phys_avail[i] && + highaddr > phys_avail[i])) + return (1); + } + return (0); +} + +static __inline struct arm32_dma_range * +_bus_dma_inrange(struct arm32_dma_range *ranges, int nranges, + bus_addr_t curaddr) +{ + struct arm32_dma_range *dr; + int i; + + for (i = 0, dr = ranges; i < nranges; i++, dr++) { + if (curaddr >= dr->dr_sysbase && + round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len)) + return (dr); + } + + return (NULL); +} + +/* + * Return true if a match is made. + * + * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'. + * + * If paddr is within the bounds of the dma tag then call the filter callback + * to check for a match, if there is no filter callback then assume a match. + */ +int +run_filter(bus_dma_tag_t dmat, bus_addr_t paddr) +{ + int retval; + + retval = 0; + + do { + if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr) + || ((paddr & (dmat->alignment - 1)) != 0)) + && (dmat->filter == NULL + || (*dmat->filter)(dmat->filterarg, paddr) != 0)) + retval = 1; + + dmat = dmat->parent; + } while (retval == 0 && dmat != NULL); + return (retval); +} + +/* + * Convenience function for manipulating driver locks from busdma (during + * busdma_swi, for example). Drivers that don't provide their own locks + * should specify &Giant to dmat->lockfuncarg. Drivers that use their own + * non-mutex locking scheme don't have to use this at all. + */ +void +busdma_lock_mutex(void *arg, bus_dma_lock_op_t op) +{ + struct mtx *dmtx; + + dmtx = (struct mtx *)arg; + switch (op) { + case BUS_DMA_LOCK: + mtx_lock(dmtx); + break; + case BUS_DMA_UNLOCK: + mtx_unlock(dmtx); + break; + default: + panic("Unknown operation 0x%x for busdma_lock_mutex!", op); + } +} + +/* + * dflt_lock should never get called. It gets put into the dma tag when + * lockfunc == NULL, which is only valid if the maps that are associated + * with the tag are meant to never be defered. + * XXX Should have a way to identify which driver is responsible here. + */ +static void +dflt_lock(void *arg, bus_dma_lock_op_t op) +{ + panic("driver error: busdma dflt_lock called"); +} + +/* + * Allocate a device specific dma_tag. + */ +int +bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment, + bus_size_t boundary, bus_addr_t lowaddr, + bus_addr_t highaddr, bus_dma_filter_t *filter, + void *filterarg, bus_size_t maxsize, int nsegments, + bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc, + void *lockfuncarg, bus_dma_tag_t *dmat) +{ + bus_dma_tag_t newtag; + int error = 0; + +#if 0 + if (!parent) + parent = arm_root_dma_tag; +#endif + + /* Basic sanity checking */ + if (boundary != 0 && boundary < maxsegsz) + maxsegsz = boundary; + + /* Return a NULL tag on failure */ + *dmat = NULL; + + if (maxsegsz == 0) { + return (EINVAL); + } + + newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, + M_ZERO | M_NOWAIT); + if (newtag == NULL) { + CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", + __func__, newtag, 0, error); + return (ENOMEM); + } + + newtag->parent = parent; + newtag->alignment = alignment; + newtag->boundary = boundary; + newtag->lowaddr = trunc_page((vm_paddr_t)lowaddr) + (PAGE_SIZE - 1); + newtag->highaddr = trunc_page((vm_paddr_t)highaddr) + + (PAGE_SIZE - 1); + newtag->filter = filter; + newtag->filterarg = filterarg; + newtag->maxsize = maxsize; + newtag->nsegments = nsegments; + newtag->maxsegsz = maxsegsz; + newtag->flags = flags; + newtag->ref_count = 1; /* Count ourself */ + newtag->map_count = 0; + newtag->ranges = bus_dma_get_range(); + newtag->_nranges = bus_dma_get_range_nb(); + if (lockfunc != NULL) { + newtag->lockfunc = lockfunc; + newtag->lockfuncarg = lockfuncarg; + } else { + newtag->lockfunc = dflt_lock; + newtag->lockfuncarg = NULL; + } + newtag->segments = NULL; + + /* Take into account any restrictions imposed by our parent tag */ + if (parent != NULL) { + newtag->lowaddr = MIN(parent->lowaddr, newtag->lowaddr); + newtag->highaddr = MAX(parent->highaddr, newtag->highaddr); + if (newtag->boundary == 0) + newtag->boundary = parent->boundary; + else if (parent->boundary != 0) + newtag->boundary = MIN(parent->boundary, + newtag->boundary); + if ((newtag->filter != NULL) || + ((parent->flags & BUS_DMA_COULD_BOUNCE) != 0)) + newtag->flags |= BUS_DMA_COULD_BOUNCE; + if (newtag->filter == NULL) { + /* + * Short circuit looking at our parent directly + * since we have encapsulated all of its information + */ + newtag->filter = parent->filter; + newtag->filterarg = parent->filterarg; + newtag->parent = parent->parent; + } + if (newtag->parent != NULL) + atomic_add_int(&parent->ref_count, 1); + } + + if (_bus_dma_can_bounce(newtag->lowaddr, newtag->highaddr) + || newtag->alignment > 1) + newtag->flags |= BUS_DMA_COULD_BOUNCE; + + if (((newtag->flags & BUS_DMA_COULD_BOUNCE) != 0) && + (flags & BUS_DMA_ALLOCNOW) != 0) { + struct bounce_zone *bz; + + /* Must bounce */ + + if ((error = alloc_bounce_zone(newtag)) != 0) { + free(newtag, M_DEVBUF); + return (error); + } + bz = newtag->bounce_zone; + + if (ptoa(bz->total_bpages) < maxsize) { + int pages; + + pages = atop(maxsize) - bz->total_bpages; + + /* Add pages to our bounce pool */ + if (alloc_bounce_pages(newtag, pages) < pages) + error = ENOMEM; + } + /* Performed initial allocation */ + newtag->flags |= BUS_DMA_MIN_ALLOC_COMP; + } else + newtag->bounce_zone = NULL; + + if (error != 0) { + free(newtag, M_DEVBUF); + } else { + *dmat = newtag; + } + CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d", + __func__, newtag, (newtag != NULL ? newtag->flags : 0), error); + return (error); +} + +int +bus_dma_tag_destroy(bus_dma_tag_t dmat) +{ + bus_dma_tag_t dmat_copy; + int error; + + error = 0; + dmat_copy = dmat; + + if (dmat != NULL) { + + if (dmat->map_count != 0) { + error = EBUSY; + goto out; + } + + while (dmat != NULL) { + bus_dma_tag_t parent; + + parent = dmat->parent; + atomic_subtract_int(&dmat->ref_count, 1); + if (dmat->ref_count == 0) { + if (dmat->segments != NULL) + free(dmat->segments, M_DEVBUF); + free(dmat, M_DEVBUF); + /* + * Last reference count, so + * release our reference + * count on our parent. + */ + dmat = parent; + } else + dmat = NULL; + } + } +out: + CTR3(KTR_BUSDMA, "%s tag %p error %d", __func__, dmat_copy, error); + return (error); +} + +/* + * Allocate a handle for mapping from kva/uva/physical + * address space into bus device space. + */ +int +bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp) +{ + int error; + + error = 0; + + *mapp = (bus_dmamap_t)malloc(sizeof(**mapp), M_DEVBUF, + M_NOWAIT | M_ZERO); + if (*mapp == NULL) { + CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM); + return (ENOMEM); + } + STAILQ_INIT(&((*mapp)->slist)); + + if (dmat->segments == NULL) { + dmat->segments = (bus_dma_segment_t *)malloc( + sizeof(bus_dma_segment_t) * dmat->nsegments, M_DEVBUF, + M_NOWAIT); + if (dmat->segments == NULL) { + CTR3(KTR_BUSDMA, "%s: tag %p error %d", + __func__, dmat, ENOMEM); + free(*mapp, M_DEVBUF); + *mapp = NULL; + return (ENOMEM); + } + } + /* + * Bouncing might be required if the driver asks for an active + * exclusion region, a data alignment that is stricter than 1, and/or + * an active address boundary. + */ + if (dmat->flags & BUS_DMA_COULD_BOUNCE) { + + /* Must bounce */ + struct bounce_zone *bz; + int maxpages; + + if (dmat->bounce_zone == NULL) { + if ((error = alloc_bounce_zone(dmat)) != 0) { + free(*mapp, M_DEVBUF); + *mapp = NULL; + return (error); + } + } + bz = dmat->bounce_zone; + + /* Initialize the new map */ + STAILQ_INIT(&((*mapp)->bpages)); + + /* + * Attempt to add pages to our pool on a per-instance + * basis up to a sane limit. + */ + maxpages = MAX_BPAGES; + if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0 + || (bz->map_count > 0 && bz->total_bpages < maxpages)) { + int pages; + + pages = MAX(atop(dmat->maxsize), 1); + pages = MIN(maxpages - bz->total_bpages, pages); + pages = MAX(pages, 1); + if (alloc_bounce_pages(dmat, pages) < pages) + error = ENOMEM; + + if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) { + if (error == 0) + dmat->flags |= BUS_DMA_MIN_ALLOC_COMP; + } else { + error = 0; + } + } + bz->map_count++; + } + if (error == 0) + dmat->map_count++; + CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", + __func__, dmat, dmat->flags, error); + return (error); +} + +/* + * Destroy a handle for mapping from kva/uva/physical + * address space into bus device space. + */ +int +bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map) +{ + if (STAILQ_FIRST(&map->bpages) != NULL || + STAILQ_FIRST(&map->slist) != NULL) { + CTR3(KTR_BUSDMA, "%s: tag %p error %d", + __func__, dmat, EBUSY); + return (EBUSY); + } + if (dmat->bounce_zone) + dmat->bounce_zone->map_count--; + free(map, M_DEVBUF); + dmat->map_count--; + CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat); + return (0); +} + + +/* + * Allocate a piece of memory that can be efficiently mapped into + * bus device space based on the constraints lited in the dma tag. + * A dmamap to for use with dmamap_load is also allocated. + */ +int +bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags, + bus_dmamap_t *mapp) +{ + int mflags, len; + + if (flags & BUS_DMA_NOWAIT) + mflags = M_NOWAIT; + else + mflags = M_WAITOK; + + /* ARM non-snooping caches need a map for the VA cache sync structure */ + + *mapp = (bus_dmamap_t)malloc(sizeof(**mapp), M_DEVBUF, + M_NOWAIT | M_ZERO); + if (*mapp == NULL) { + CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", + __func__, dmat, dmat->flags, ENOMEM); + return (ENOMEM); + } + + STAILQ_INIT(&((*mapp)->slist)); + + if (dmat->segments == NULL) { + dmat->segments = (bus_dma_segment_t *)malloc( + sizeof(bus_dma_segment_t) * dmat->nsegments, M_DEVBUF, + mflags); + if (dmat->segments == NULL) { + CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", + __func__, dmat, dmat->flags, ENOMEM); + free(*mapp, M_DEVBUF); + *mapp = NULL; + return (ENOMEM); + } + } + + if (flags & BUS_DMA_ZERO) + mflags |= M_ZERO; + + /* + * XXX: + * (dmat->alignment < dmat->maxsize) is just a quick hack; the exact + * alignment guarantees of malloc need to be nailed down, and the + * code below should be rewritten to take that into account. + * + * In the meantime, we'll warn the user if malloc gets it wrong. + * + * allocate at least a cache line. This should help avoid cache + * corruption. + */ + len = max(dmat->maxsize, arm_dcache_align); + if (len <= PAGE_SIZE && + (dmat->alignment < len) && + !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) { + *vaddr = malloc(len, M_DEVBUF, mflags); + } else { + /* + * XXX Use Contigmalloc until it is merged into this facility + * and handles multi-seg allocations. Nobody is doing + * multi-seg allocations yet though. + * XXX Certain AGP hardware does. + */ + *vaddr = contigmalloc(len, M_DEVBUF, mflags, + 0ul, dmat->lowaddr, dmat->alignment? dmat->alignment : 1ul, + dmat->boundary); + } + if (*vaddr == NULL) { + CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", + __func__, dmat, dmat->flags, ENOMEM); + free(*mapp, M_DEVBUF); + *mapp = NULL; + return (ENOMEM); + } else if ((uintptr_t)*vaddr & (dmat->alignment - 1)) { + printf("bus_dmamem_alloc failed to align memory properly.\n"); + } + dmat->map_count++; + + if (flags & BUS_DMA_COHERENT) + pmap_change_attr((vm_offset_t)*vaddr, len, + BUS_DMA_NOCACHE); + + CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d", + __func__, dmat, dmat->flags, 0); + return (0); +} + +/* + * Free a piece of memory and it's allociated dmamap, that was allocated + * via bus_dmamem_alloc. Make the same choice for free/contigfree. + */ +void +bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map) +{ + int len; + +#ifdef mftnotyet + pmap_change_attr((vm_offset_t)vaddr, dmat->maxsize, ARM_WRITE_BACK); +#endif + len = max(dmat->maxsize, arm_dcache_align); + if (len <= PAGE_SIZE && + (dmat->alignment < len) && + !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) + free(vaddr, M_DEVBUF); + else { + contigfree(vaddr, len, M_DEVBUF); + } + dmat->map_count--; + free(map, M_DEVBUF); + CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags); +} + +static int +_bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, + void *buf, bus_size_t buflen, int flags) +{ + vm_offset_t vaddr; + vm_offset_t vendaddr; + bus_addr_t paddr; + + if (map->pagesneeded == 0) { + CTR5(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d" + " map= %p, pagesneeded= %d", + dmat->lowaddr, dmat->boundary, dmat->alignment, + map, map->pagesneeded); + /* + * Count the number of bounce pages + * needed in order to complete this transfer + */ + vaddr = (vm_offset_t)buf; + vendaddr = (vm_offset_t)buf + buflen; + + while (vaddr < vendaddr) { + if (__predict_true(map->pmap == pmap_kernel())) + paddr = pmap_kextract(vaddr); + else + paddr = pmap_extract(map->pmap, vaddr); + if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) && + run_filter(dmat, paddr) != 0) { + map->pagesneeded++; + } + vaddr += (PAGE_SIZE - ((vm_offset_t)vaddr & PAGE_MASK)); + + } + CTR1(KTR_BUSDMA, "pagesneeded= %d", map->pagesneeded); *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***