Date: Mon, 30 Nov 2015 18:20:21 +0000 (GMT) From: jenkins-admin@FreeBSD.org To: mmel@FreeBSD.org, ngie@FreeBSD.org, jenkins-admin@FreeBSD.org, freebsd-current@FreeBSD.org, freebsd-i386@FreeBSD.org Subject: FreeBSD_HEAD_i386 - Build #1804 - Fixed Message-ID: <2062622331.313.1448907626700.JavaMail.jenkins@jenkins-9.freebsd.org> In-Reply-To: <727646234.309.1448899481254.JavaMail.jenkins@jenkins-9.freebsd.org> References: <727646234.309.1448899481254.JavaMail.jenkins@jenkins-9.freebsd.org>
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FreeBSD_HEAD_i386 - Build #1804 - Fixed: Build information: https://jenkins.FreeBSD.org/job/FreeBSD_HEAD_i386/1804/ Full change log: https://jenkins.FreeBSD.org/job/FreeBSD_HEAD_i386/1804/changes Full build log: https://jenkins.FreeBSD.org/job/FreeBSD_HEAD_i386/1804/console Change summaries: 291492 by mmel: ARM: create new memory attribute for writethrough cacheable memory. - add new TEX class for WT cacheable memory - export new TEX class to kernel as VM_MEMATTR_WT attribute - add new aliases VM_MEMATTR_WRITE_COMBINING and VM_MEMATTR_WRITE_BACK, it's used in DRM code Note: Only Cortex A8 supports WT caching in HW. On rest of Cortex CPUs, WT requests is treated as uncacheable. Approved by: kib (mentor) 291491 by ngie: Fix the build after ifconfig was converted over to lib80211 in r291470 Reported by: jenkins, O. Hartmann <ohartman@zedat.fu-berlin.de> Pointyhat to: adrian
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