From owner-svn-src-stable@FreeBSD.ORG Fri Sep 11 17:12:44 2009 Return-Path: Delivered-To: svn-src-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 730FC106566C; Fri, 11 Sep 2009 17:12:44 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 618998FC14; Fri, 11 Sep 2009 17:12:44 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id n8BHCium058174; Fri, 11 Sep 2009 17:12:44 GMT (envelope-from yongari@svn.freebsd.org) Received: (from yongari@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id n8BHCikr058172; Fri, 11 Sep 2009 17:12:44 GMT (envelope-from yongari@svn.freebsd.org) Message-Id: <200909111712.n8BHCikr058172@svn.freebsd.org> From: Pyun YongHyeon Date: Fri, 11 Sep 2009 17:12:43 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-7@freebsd.org X-SVN-Group: stable-7 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r197094 - in stable/7/sys: . contrib/pf dev/mii X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 11 Sep 2009 17:12:44 -0000 Author: yongari Date: Fri Sep 11 17:12:43 2009 New Revision: 197094 URL: http://svn.freebsd.org/changeset/base/197094 Log: MFC r196366: Backout r193289. r193289 restored page select bits to previous value instead of blindly resetting it to 0. However, it seems page select bits of some 88E1116 PHY is initialized to invalid one such that restoring page select bits after programming broke MII register access. The correct solution would be reset page select bits to 0 in PHY attach stage but it would require more testing. Since we're in BETA stage such a change would be dangerous so just back it out. This change should fix nfe(4) breakage on NVIDIA MCP55. Reported by: Ryan Rogers < webmaster <> doghouserepair dot com > Sam Fourman Jr. < sfourman <> gmail dot com > Tested by: Ryan Rogers < webmaster <> doghouserepair dot com > Sam Fourman Jr. < sfourman <> gmail dot com > Modified: stable/7/sys/ (props changed) stable/7/sys/contrib/pf/ (props changed) stable/7/sys/dev/mii/e1000phy.c Modified: stable/7/sys/dev/mii/e1000phy.c ============================================================================== --- stable/7/sys/dev/mii/e1000phy.c Fri Sep 11 16:53:12 2009 (r197093) +++ stable/7/sys/dev/mii/e1000phy.c Fri Sep 11 17:12:43 2009 (r197094) @@ -239,13 +239,11 @@ e1000phy_reset(struct mii_softc *sc) if (esc->mii_model == MII_MODEL_MARVELL_E1116 || esc->mii_model == MII_MODEL_MARVELL_E1149) { - page = PHY_READ(sc, E1000_EADR); - /* Select page 2, MAC specific control register. */ PHY_WRITE(sc, E1000_EADR, 2); reg = PHY_READ(sc, E1000_SCR); reg |= E1000_SCR_RGMII_POWER_UP; PHY_WRITE(sc, E1000_SCR, reg); - PHY_WRITE(sc, E1000_EADR, page); + PHY_WRITE(sc, E1000_EADR, 0); } }