From owner-svn-src-stable@FreeBSD.ORG Fri Nov 1 20:28:15 2013 Return-Path: Delivered-To: svn-src-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTP id F005BA0A; Fri, 1 Nov 2013 20:28:14 +0000 (UTC) (envelope-from brooks@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id CC8B9266D; Fri, 1 Nov 2013 20:28:14 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id rA1KSEB4038640; Fri, 1 Nov 2013 20:28:14 GMT (envelope-from brooks@svn.freebsd.org) Received: (from brooks@localhost) by svn.freebsd.org (8.14.7/8.14.5/Submit) id rA1KSEwR038637; Fri, 1 Nov 2013 20:28:14 GMT (envelope-from brooks@svn.freebsd.org) Message-Id: <201311012028.rA1KSEwR038637@svn.freebsd.org> From: Brooks Davis Date: Fri, 1 Nov 2013 20:28:14 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r257522 - in stable/10/sys: dev/fdt mips/beri X-SVN-Group: stable-10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 Nov 2013 20:28:15 -0000 Author: brooks Date: Fri Nov 1 20:28:13 2013 New Revision: 257522 URL: http://svnweb.freebsd.org/changeset/base/257522 Log: MFC r256911, r256936 MFP4: 223121 (PIC portion), 225861, 227822, 229692 (PIC only), 229693, 230523, 1123614 Implement a driver for Robert Norton's PIC as an FDT interrupt controller. Devices whose interrupt-parent property points to a beripic device will have their interrupt allocation, activation, and setup operations routed through the IC rather than down the traditional bus hierarchy. This driver largely abstracts the underlying CPU away allowing the PIC to be implemented on CPU's other than BERI. Due to insufficient abstractions a small amount of MIPS specific code is currently required in fdt_mips.c and to implement counters. Sponsored by: DARPA/AFRL Approved by: re (gjb) Added: stable/10/sys/mips/beri/beri_pic.c - copied, changed from r256911, head/sys/mips/beri/beri_pic.c Modified: stable/10/sys/dev/fdt/fdt_mips.c stable/10/sys/mips/beri/files.beri Directory Properties: stable/10/sys/ (props changed) Modified: stable/10/sys/dev/fdt/fdt_mips.c ============================================================================== --- stable/10/sys/dev/fdt/fdt_mips.c Fri Nov 1 19:50:30 2013 (r257521) +++ stable/10/sys/dev/fdt/fdt_mips.c Fri Nov 1 20:28:13 2013 (r257522) @@ -68,7 +68,26 @@ fdt_pic_decode_mips4k_cp0(phandle_t node return (0); } +/* + * CHERI PIC decoder. + */ +static int +fdt_pic_decode_beri(phandle_t node, pcell_t *intr, int *interrupt, + int *trig, int *pol) +{ + + if (!fdt_is_compatible(node, "sri-cambridge,beri-pic")) + return (ENXIO); + + *interrupt = fdt32_to_cpu(intr[0]); + *trig = INTR_TRIGGER_CONFORM; + *pol = INTR_POLARITY_CONFORM; + + return (0); +} + fdt_pic_decode_t fdt_pic_table[] = { &fdt_pic_decode_mips4k_cp0, + &fdt_pic_decode_beri, NULL }; Copied and modified: stable/10/sys/mips/beri/beri_pic.c (from r256911, head/sys/mips/beri/beri_pic.c) ============================================================================== --- head/sys/mips/beri/beri_pic.c Tue Oct 22 15:29:59 2013 (r256911, copy source) +++ stable/10/sys/mips/beri/beri_pic.c Fri Nov 1 20:28:13 2013 (r257522) @@ -646,15 +646,9 @@ beripic_send_ipi(device_t ic, u_int tid) KASSERT(tid < sc->bp_nsoft, ("tid (%d) too large\n", tid)); - printf("sending ipi to %d soft intrs %jx\n", tid, - bus_space_read_8(sc->bp_read_bst, sc->bp_read_bsh, 8)); - bit = 1ULL << (tid % 64); bus_space_write_8(sc->bp_set_bst, sc->bp_set_bsh, (BP_FIRST_SOFT / 8) + (tid / 64), bit); - - printf("sent ipi to %d soft intrs %jx\n", tid, - bus_space_read_8(sc->bp_read_bst, sc->bp_read_bsh, 8)); } static void Modified: stable/10/sys/mips/beri/files.beri ============================================================================== --- stable/10/sys/mips/beri/files.beri Fri Nov 1 19:50:30 2013 (r257521) +++ stable/10/sys/mips/beri/files.beri Fri Nov 1 20:28:13 2013 (r257522) @@ -17,5 +17,6 @@ dev/terasic/mtl/terasic_mtl_reg.c option dev/terasic/mtl/terasic_mtl_syscons.c optional terasic_mtl dev/terasic/mtl/terasic_mtl_text.c optional terasic_mtl mips/beri/beri_machdep.c standard +mips/beri/beri_pic.c optional fdt mips/mips/intr_machdep.c standard mips/mips/tick.c standard