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Date:      Thu, 15 Jun 2023 19:29:04 +0300
From:      titus <titus@edc.ro>
To:        freebsd-arm@freebsd.org
Subject:   Support for rockpi-s (rockchip rk3308)
Message-ID:  <ZIs8UJqeupPz1j1j@buko.edc.ro>

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--tSRd7davl5znE93e
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Hello, 
I hacked some crude support for rockpi-s.
SD card works
USB works
UART works
Ethernet works (no media autodetect but works).

I added support rk3308-cru (clock), rk3308-pinctrl, rk3308-gmac mostly by
looking at the linux and openbsd code

https://forums.freebsd.org/threads/adding-support-for-the-rockpi-s.80956/#post-613952
dmesg attached

-- 

---------------------------------------------------------------------
How an engineer writes a program: Starts by debugging an empty file...
 Titus Manea  <titus@edc.ro>       |  Eastern Digital Inc.
        

--tSRd7davl5znE93e
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Content-Disposition: attachment; filename="dmesg.txt"

WARNING: Cannot find freebsd,dts-version property, cannot check DTB compliance
Copyright (c) 1992-2021 The FreeBSD Project.
Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
	The Regents of the University of California. All rights reserved.
FreeBSD is a registered trademark of The FreeBSD Foundation.
FreeBSD 13.2-RELEASE GENERIC arm64
FreeBSD clang version 14.0.5 (https://github.com/llvm/llvm-project.git llvmorg-14.0.5-0-gc12386ae247c)
VT: init without driver.
module firmware already present!
real memory  = 534773760 (510 MB)
avail memory = 499032064 (475 MB)
Starting CPU 1 (1)
Starting CPU 2 (2)
Starting CPU 3 (3)
FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs
random: unblocking device.
random: entropy device external interface
MAP 1cf02000 mode 2 pages 2
MAP 1cf05000 mode 2 pages 6
MAP 1ff40000 mode 2 pages 16
kbd0 at kbdmux0
ofwbus0: <Open Firmware Device Tree>
clk_fixed0: <Fixed clock> on ofwbus0
clk_fixed1: <Fixed clock> on ofwbus0
rk_grf0: <RockChip General Register Files> mem 0xff000000-0xff007fff on ofwbus0
rk3308_cru0: <Rockchip RK3308 Clock & Reset Unit> mem 0xff500000-0xff500fff on ofwbus0
regfix0: <Fixed Regulator> on ofwbus0
regfix1: <Fixed Regulator> on ofwbus0
regfix2: <Fixed Regulator> on ofwbus0
regfix3: <Fixed Regulator> on ofwbus0
regfix4: <Fixed Regulator> on ofwbus0
regfix5: <Fixed Regulator> on ofwbus0
regfix6: <Fixed Regulator> on ofwbus0
simple_mfd0: <Simple MFD (Multi-Functions Device)> mem 0xff008000-0xff00afff on ofwbus0
simple_mfd1: <Simple MFD (Multi-Functions Device)> mem 0xff00b000-0xff00bfff on ofwbus0
simple_mfd2: <Simple MFD (Multi-Functions Device)> mem 0xff00c000-0xff00cfff on ofwbus0
psci0: <ARM Power State Co-ordination Interface Driver> on ofwbus0
gic0: <ARM Generic Interrupt Controller> mem 0xff581000-0xff581fff,0xff582000-0xff583fff,0xff584000-0xff585fff,0xff586000-0xff587fff irq 47 on ofwbus0
gic0: pn 0x2, arch 0x2, rev 0x1, implementer 0x43b irqs 160
rk_pinctrl0: <RockChip Pinctrl controller> on ofwbus0
gpio0: <RockChip GPIO Bank controller> mem 0xff220000-0xff2200ff irq 48 on rk_pinctrl0
gpiobus0: <OFW GPIO bus> on gpio0
gpio1: <RockChip GPIO Bank controller> mem 0xff230000-0xff2300ff irq 49 on rk_pinctrl0
gpiobus1: <OFW GPIO bus> on gpio1
gpio2: <RockChip GPIO Bank controller> mem 0xff240000-0xff2400ff irq 50 on rk_pinctrl0
gpiobus2: <OFW GPIO bus> on gpio2
gpio3: <RockChip GPIO Bank controller> mem 0xff250000-0xff2500ff irq 51 on rk_pinctrl0
gpiobus3: <OFW GPIO bus> on gpio3
gpio4: <RockChip GPIO Bank controller> mem 0xff260000-0xff2600ff irq 52 on rk_pinctrl0
gpiobus4: <OFW GPIO bus> on gpio4
rk_i2c0: <RockChip I2C> mem 0xff050000-0xff050fff irq 9 on ofwbus0
iicbus0: <OFW I2C bus> on rk_i2c0
generic_timer0: <ARMv8 Generic Timer> irq 4,5,6,7 on ofwbus0
Timecounter "ARM MPCore Timecounter" frequency 24000000 Hz quality 1000
Event timer "ARM MPCore Eventtimer" frequency 24000000 Hz quality 1000
mmc_pwrseq0: <MMC Simple Power sequence> on ofwbus0
rk_usb2phy0: <Rockchip USB2PHY> mem 0-0xff007fff,0-0x2fff on simple_mfd0
cpulist0: <Open Firmware CPU Group> on ofwbus0
cpu0: <Open Firmware CPU> on cpulist0
cpufreq_dt0: <Generic cpufreq driver> on cpu0
cpufreq_dt0: no regulator for cpu@0
device_attach: cpufreq_dt0 attach returned 6
cpu1: <Open Firmware CPU> on cpulist0
cpu2: <Open Firmware CPU> on cpulist0
cpu3: <Open Firmware CPU> on cpulist0
iic0: <I2C generic I/O> on iicbus0
uart0: <16750 or compatible> mem 0xff0a0000-0xff0a00ff irq 13 on ofwbus0
uart0: console (1500000,n,8,1)
uart1: <16750 or compatible> mem 0xff0c0000-0xff0c00ff irq 15 on ofwbus0
uart2: <16750 or compatible> mem 0xff0e0000-0xff0e00ff irq 17 on ofwbus0
pwm0: <Rockchip PWM> mem 0xff180000-0xff18000f on ofwbus0
pwmbus0: <OFW PWM bus> on pwm0
pwmc0: <PWM Control> channel 0 on pwmbus0
dwcotg0: <DWC OTG 2.0 integrated USB controller> mem 0xff400000-0xff43ffff irq 36 on ofwbus0
usbus1 on dwcotg0
ehci0: <Generic EHCI Controller> mem 0xff440000-0xff44ffff irq 37 on ofwbus0
usbus2: EHCI version 1.0
usbus2 on ehci0
ohci0: <Generic OHCI Controller> mem 0xff450000-0xff45ffff irq 38 on ofwbus0
usbus3 on ohci0
rockchip_dwmmc0: <Synopsys DesignWare Mobile Storage Host Controller (RockChip)> mem 0xff480000-0xff483fff irq 39 on ofwbus0
rockchip_dwmmc0: Hardware version ID is 270a
mmc0: <MMC/SD bus> on rockchip_dwmmc0
rockchip_dwmmc1: <Synopsys DesignWare Mobile Storage Host Controller (RockChip)> mem 0xff490000-0xff493fff irq 40 on ofwbus0
rockchip_dwmmc1: Hardware version ID is 270a
mmc1: <MMC/SD bus> on rockchip_dwmmc1
rockchip_dwmmc2: <Synopsys DesignWare Mobile Storage Host Controller (RockChip)> mem 0xff4a0000-0xff4a3fff irq 41 on ofwbus0
rockchip_dwmmc2: Hardware version ID is 270a
mmc2: <MMC/SD bus> on rockchip_dwmmc2
dwc0: <Rockchip Gigabit Ethernet Controller> mem 0xff4e0000-0xff4effff irq 43 on ofwbus0
ETH BLAH 22
miibus0: <MII bus> on dwc0
ukphy0: <Generic IEEE 802.3u media interface> PHY 0 on miibus0
ukphy0:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
ukphy1: <Generic IEEE 802.3u media interface> PHY 1 on miibus0
ukphy1:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
dwc0: Ethernet address: 62:73:64:77:1b:ef
gpioc0: <GPIO controller> on gpio0
gpioc1: <GPIO controller> on gpio1
gpioc2: <GPIO controller> on gpio2
gpioc3: <GPIO controller> on gpio3
gpioc4: <GPIO controller> on gpio4
gpioled0: <GPIO LEDs> on ofwbus0
armv8crypto0: <AES-CBC,AES-XTS,AES-GCM>
Timecounters tick every 1.000 msec
Cannot set frequency for clk: clk_sdmmc, error: 34
rockchip_dwmmc0: failed to set frequency to 400000 Hz: 34
usbus1: 480Mbps High Speed USB v2.0
usbus2: 480Mbps High Speed USB v2.0
usbus3: 12Mbps Full Speed USB v1.0
ugen3.1: <Generic OHCI root HUB> at usbus3
uhub0 on usbus3
uhub0: <Generic OHCI root HUB, class 9/0, rev 1.00/1.00, addr 1> on usbus3
ugen2.1: <Generic EHCI root HUB> at usbus2
uhub1 on usbus2
uhub1: <Generic EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus2
ugen1.1: <DWCOTG OTG Root HUB> at usbus1
uhub2 on usbus1
uhub2: <DWCOTG OTG Root HUB, class 9/0, rev 2.00/1.00, addr 1> on usbus1
mmcsd0: 16GB <SDHC SA16G 3.1 SN 2990F16F MFG 07/2019 by 2 TM> at mmc0 50.0MHz/4bit/1016-block
mmc1: No compatible cards found on bus
Cannot set frequency for clk: clk_sdio, error: 34
rockchip_dwmmc2: failed to set frequency to 400000 Hz: 34
mmc2: No compatible cards found on bus
CPU  0: ARM Cortex-A35 r0p2 affinity:  0
                   Cache Type = <64 byte D-cacheline,64 byte I-cacheline,VIPT ICache,64 byte ERG,64 byte CWG>
 Instruction Set Attributes 0 = <CRC32,SHA2,SHA1,AES+PMULL>
 Instruction Set Attributes 1 = <>
 Instruction Set Attributes 2 = <>
         Processor Features 0 = <AdvSIMD,FP,EL3 32,EL2 32,EL1 32,EL0 32>
         Processor Features 1 = <>
      Memory Model Features 0 = <TGran4,TGran64,TGran16,SNSMem,BigEnd,16bit ASID,1TB PA>
      Memory Model Features 1 = <8bit VMID>
      Memory Model Features 2 = <32bit CCIDX,48bit VA>
             Debug Features 0 = <DoubleLock,2 CTX BKPTs,4 Watchpoints,6 Breakpoints,PMUv3,Debugv8>
             Debug Features 1 = <>
         Auxiliary Features 0 = <>
         Auxiliary Features 1 = <>
AArch32 Instruction Set Attributes 5 = <CRC32,SHA2,SHA1,AES+VMULL,SEVL>
AArch32 Media and VFP Features 0 = <FPRound,FPSqrt,FPDivide,DP VFPv3+v4,SP VFPv3+v4,AdvSIMD>
AArch32 Media and VFP Features 1 = <SIMDFMAC,FPHP DP Conv,SIMDHP SP Conv,SIMDSP,SIMDInt,SIMDLS,FPDNaN,FPFtZ>
CPU  1: ARM Cortex-A35 r0p2 affinity:  1
CPU  2: ARM Cortex-A35 r0p2 affinity:  2
CPU  3: ARM Cortex-A35 r0p2 affinity:  3
Release APs...done
Unresolved linked clock found: clk_rtc_32k
Unresolved linked clock found: clk_ddrphy1x_out
Unresolved linked clock found: clk_pvtm_32k
Trying to mount root from ufs:/dev/ufs/rootfs [rw,noatime]...
Unresolved linked clock found: xin32k
Unresolved linked clock found: mclk_i2s0_8ch_in
Unresolved linked clock found: mclk_i2s1_8ch_in
Unresolved linked clock found: mclk_i2s2_8ch_in
Unresolved linked clock found: mclk_i2s3_8ch_in
Unresolved linked clock found: mclk_i2s0_2ch_in
Unresolved linked clock found: mclk_i2s1_2ch_in
Unresolved linked clock found: dummy
Warning: no time-of-day clock registered, system time will not be set accurately
Dual Console: Serial Primary, Video Secondary
uhub0: 1 port with 1 removable, self powered
uhub2: 1 port with 1 removable, self powered
uhub1: 1 port with 1 removable, self powered
lo0: link state changed to UP
dwc0: link state changed to UP

--tSRd7davl5znE93e--



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