From nobody Mon Jul 13 19:13:44 2026 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4gzXCy0Hsdz6lgQY for ; Mon, 13 Jul 2026 19:13:50 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "YR1" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4gzXCx6q0Lz3Sfx for ; Mon, 13 Jul 2026 19:13:49 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1783970030; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=w4uH9hKNyEKrmVyoKBDECDwrCTVJAmWkR2GlU+yIvhQ=; b=ZpCcvgdjSspXVawcWU4b7gWfxZlAiwv9s2JOTyL8PJ7fkUufwdQ6gmGjy4cZa+eOPcqbG9 iRS9Eje+Y0xCIb93xRu9dmMx50zFNKtgOurKoaPRAVGYDXrjG1N/SODJBCU96NKG/PqSNR BcmI0mkUd590lO/3nU28LCrfmswfp1EKEq5+NLeZnMDV5vcuttU1SHFoS0szkIR2dovQDU 0EW8vHvTw0yjJ9yGC9r51Zgtmq02xmv0QwSn8AS8aunKt+42Ghl2/3Pd61bJJCyHrYke3R kkTHrkncTmQbBdQVo7lmqBzmpvuOrj4B2uzzIfJAx+DaJJhlJ+LwjLefS2Yeiw== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1783970030; a=rsa-sha256; cv=none; b=qY5p6yjiK3TVBlSPZDow81MGNQlGa3Sz5hZJ/mbEDykjwPGaGnDHkeyQHfsSm1e9qcGFl1 c6mkily5xS9GXbJdhfFnrCVJ0lm6MC3k/kRawevDDmfAnYzOEHbjX2IoE4ty9mpqmZnzim PS3hLjemmXrpi27Bna3GhABkDHCkkeF296x4Dmo4Et0CTSRfl64wllR5MDCxk+rvTyWClq ZrzIkALrR+7ecdZJsGEaDmbD/hBuc63DznccSUlO28ywSXlzPNbpp9VYuiarLJBwMPGZur ATG43YKIuCIxsLbEj7tbnD3nBwzOZGdQ9cOvcDNx84vY3FP7c/e3dtDRDWCFxQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1783970030; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=w4uH9hKNyEKrmVyoKBDECDwrCTVJAmWkR2GlU+yIvhQ=; b=XL7AHWrblS+XeRM0AGlNOGWaoqcBJsqfj/+9nLqCFbDKwQ6QRrRsxBOf2cTUctf+0ccjrc C3byiDSlDtCIUEiK8ssKwmULcI3EyMFD477uK8rvhmR0RW8RT5tNPBVNkachM3V6cQDgtl l4sGu8mCHZ336CdQFd5wCDl2TwCE1ryc33p5t9+AOV/XlkCu7QaDIbAXNq0L6niebStBBB XfeFVurfPMM1s3PwImVQxjEH9FLikFYMOLWcgN/DTmqH9/m5InfLXHgwWqycHlcQj0fQMP EroWIISegO+48C/SI95OFhpYfJj/bzP8spDT6vy8Kk61zrn3Da9TNIMfIiSNpw== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4gzXCx5bBWz19Tm for ; Mon, 13 Jul 2026 19:13:49 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 30fe2 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Mon, 13 Jul 2026 19:13:44 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Cc: Kyle Crenshaw From: Mitchell Horne Subject: git: 8ffb400bfd64 - main - rk_gpio: defer level-IRQ EOI until source line is driven low List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mhorne X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 8ffb400bfd64102ac2a49639ccbbfffbe0c6f127 Auto-Submitted: auto-generated Date: Mon, 13 Jul 2026 19:13:44 +0000 Message-Id: <6a5538e8.30fe2.22c66e2e@gitrepo.freebsd.org> The branch main has been updated by mhorne: URL: https://cgit.FreeBSD.org/src/commit/?id=8ffb400bfd64102ac2a49639ccbbfffbe0c6f127 commit 8ffb400bfd64102ac2a49639ccbbfffbe0c6f127 Author: Kyle Crenshaw AuthorDate: 2026-05-29 22:22:39 +0000 Commit: Mitchell Horne CommitDate: 2026-07-13 19:07:52 +0000 rk_gpio: defer level-IRQ EOI until source line is driven low The previous PIC bring-up (ccda002ca10) added pic_disable_intr, pic_enable_intr, pic_pre_ithread, and pic_post_ithread, but omitted pic_post_filter. Per the PIC contract pic_post_filter is non-optional; a follow-up enforcement pass is planned that will panic() if any of the three (pic_pre_ithread, pic_post_ithread, pic_post_filter) is missing. This patch also fixes the EOI ordering for level-triggered IRQs (raised by mhorne in the v1 review). Writing PORTA_EOI before intr_isrc_dispatch is correct for edge pins, but wrong for level pins: the source device has not yet deasserted the line, so the latch immediately re-arms and the controller storms. - rk_gpio_intr: EOI edge pins per-pin before dispatch (matches the pre-patch behavior for the common case); for level pins defer EOI to the post-dispatch path. Stray (no consumer) level pins still get EOI'd here because no consumer will run to clear the source. - rk_pic_post_filter: new method, EOI level pins after the filter has read+cleared the source device's IRQ register. - rk_pic_post_ithread: EOI level pins after the ithread has driven the source low, before unmasking, so the chip latch is clean when we re-enable delivery. Shape mirrors tegra_gpio(4) (sys/arm/nvidia/tegra_gpio.c). No new sysctls, no scaffolding. Smoke-tested on RockPro64 (RK3399) with fusb302 INT_N (level-low GPIO IRQ): IRQ rate steady at ~28/s under USB-C activity vs the 210 kHz storm the original missing-mask bug produced. Signed-off-by: Kyle Crenshaw Reviewed by: mhorne Fixes: ccda002ca10f ("rk_gpio: implement PIC masking methods and mask unhandled IRQs") Pull Request: https://github.com/freebsd/freebsd-src/pull/2245 --- sys/arm64/rockchip/rk_gpio.c | 57 +++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 54 insertions(+), 3 deletions(-) diff --git a/sys/arm64/rockchip/rk_gpio.c b/sys/arm64/rockchip/rk_gpio.c index 7c2071d2d178..8988ecf992a1 100644 --- a/sys/arm64/rockchip/rk_gpio.c +++ b/sys/arm64/rockchip/rk_gpio.c @@ -219,13 +219,31 @@ rk_gpio_intr(void *arg) RK_GPIO_LOCK(sc); status = rk_gpio_read_4(sc, RK_GPIO_INT_STATUS); - rk_gpio_write_4(sc, RK_GPIO_PORTA_EOI, status); RK_GPIO_UNLOCK(sc); while (status) { int pin = ffs(status) - 1; + bool is_level; status &= ~(1 << pin); + + /* + * Edge-triggered latches must be cleared before dispatch + * so a new edge during the handler still registers a new + * IRQ. Level-triggered latches must be cleared AFTER the + * consumer has deasserted the source line, otherwise the + * latch immediately re-arms and we storm. Edge EOI here; + * level EOI is deferred to pic_post_filter (filter-only + * consumers) or pic_post_ithread (threaded consumers). + */ + is_level = (sc->isrcs[pin].mode & + (GPIO_INTR_LEVEL_LOW | GPIO_INTR_LEVEL_HIGH)) != 0; + if (!is_level) { + RK_GPIO_LOCK(sc); + rk_gpio_write_4(sc, RK_GPIO_PORTA_EOI, 1u << pin); + RK_GPIO_UNLOCK(sc); + } + if (intr_isrc_dispatch(RK_GPIO_ISRC(sc, pin), tf)) { /* * Pin asserted but no consumer is registered for it @@ -235,14 +253,19 @@ rk_gpio_intr(void *arg) * messages per second. Mask the pin's IRQ at the * controller and disable further dispatches; if a * consumer attaches later it will re-enable through - * pic_enable_intr / rk_gpio_pic_enable_intr. + * pic_enable_intr / rk_gpio_pic_enable_intr. For + * level pins also EOI now -- there is no consumer + * to drive the source low. */ RK_GPIO_LOCK(sc); rk_gpio_write_bit(sc, RK_GPIO_INTMASK, pin, 1); rk_gpio_write_bit(sc, RK_GPIO_INTEN, pin, 0); + if (is_level) + rk_gpio_write_4(sc, RK_GPIO_PORTA_EOI, + 1u << pin); RK_GPIO_UNLOCK(sc); device_printf(sc->sc_dev, - "Interrupt pin=%d unhandled — masked\n", pin); + "Interrupt pin=%d unhandled -- masked\n", pin); continue; } @@ -931,10 +954,37 @@ rk_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc) struct rk_pin_irqsrc *rkisrc = (struct rk_pin_irqsrc *)isrc; RK_GPIO_LOCK(sc); + /* + * Level pins: EOI now that the ithread has driven the source low, + * then unmask so future level transitions can fire. Edge pins + * already EOI'd in rk_gpio_intr before dispatch. + */ + if (rkisrc->mode & (GPIO_INTR_LEVEL_LOW | GPIO_INTR_LEVEL_HIGH)) + rk_gpio_write_4(sc, RK_GPIO_PORTA_EOI, 1u << rkisrc->irq); rk_gpio_write_bit(sc, RK_GPIO_INTMASK, rkisrc->irq, 0); RK_GPIO_UNLOCK(sc); } +/* + * Mirror image of pic_post_ithread for filter-only consumers: the MI + * interrupt framework calls this after a filter returns FILTER_HANDLED + * (no ithread). The filter is expected to have read+cleared the source + * device's IRQ status itself, so the GPIO line is now low; we EOI the + * level latch here. Edge pins are already EOI'd in rk_gpio_intr. + */ +static void +rk_pic_post_filter(device_t dev, struct intr_irqsrc *isrc) +{ + struct rk_gpio_softc *sc = device_get_softc(dev); + struct rk_pin_irqsrc *rkisrc = (struct rk_pin_irqsrc *)isrc; + + if ((rkisrc->mode & (GPIO_INTR_LEVEL_LOW | GPIO_INTR_LEVEL_HIGH)) == 0) + return; + RK_GPIO_LOCK(sc); + rk_gpio_write_4(sc, RK_GPIO_PORTA_EOI, 1u << rkisrc->irq); + RK_GPIO_UNLOCK(sc); +} + static device_method_t rk_gpio_methods[] = { /* Device interface */ DEVMETHOD(device_probe, rk_gpio_probe), @@ -966,6 +1016,7 @@ static device_method_t rk_gpio_methods[] = { DEVMETHOD(pic_disable_intr, rk_pic_disable_intr), DEVMETHOD(pic_enable_intr, rk_pic_enable_intr), DEVMETHOD(pic_pre_ithread, rk_pic_pre_ithread), + DEVMETHOD(pic_post_filter, rk_pic_post_filter), DEVMETHOD(pic_post_ithread, rk_pic_post_ithread), /* ofw_bus interface */