From owner-freebsd-isdn@FreeBSD.ORG Thu Jan 10 16:54:59 2013 Return-Path: Delivered-To: freebsd-isdn@freebsd.org Received: from mx1.freebsd.org (mx1.FreeBSD.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 9A5CCDB4 for ; Thu, 10 Jan 2013 16:54:59 +0000 (UTC) (envelope-from hselasky@c2i.net) Received: from swip.net (mailfe05.c2i.net [212.247.154.130]) by mx1.freebsd.org (Postfix) with ESMTP id 17CCC95C for ; Thu, 10 Jan 2013 16:54:58 +0000 (UTC) X-T2-Spam-Status: No, hits=-0.2 required=5.0 tests=ALL_TRUSTED, BAYES_50 Received: from [176.74.213.204] (account mc467741@c2i.net HELO laptop015.hselasky.homeunix.org) by mailfe05.swip.net (CommuniGate Pro SMTP 5.4.4) with ESMTPA id 362162848; Thu, 10 Jan 2013 17:54:50 +0100 From: Hans Petter Selasky To: Andreas Longwitz Subject: Re: ISDN4BSD (HPS version) is going into ports Date: Thu, 10 Jan 2013 17:56:16 +0100 User-Agent: KMail/1.13.7 (FreeBSD/9.1-STABLE; KDE/4.8.4; amd64; ; ) References: <509E87EF.9070607@incore.de> <201301100813.33186.hselasky@c2i.net> <50EEA232.2030403@incore.de> In-Reply-To: <50EEA232.2030403@incore.de> X-Face: ?p&W)c(+80hU; '{.$5K+zq{oC6y| /D'an*6mw>j'f:eBsex\Gi, Cc: freebsd-isdn@freebsd.org X-BeenThere: freebsd-isdn@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Using ISDN with FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 10 Jan 2013 16:54:59 -0000 --Boundary-00=_wKv7Q3MCbSnoBf5 Content-Type: Text/Plain; charset="iso-8859-15" Content-Transfer-Encoding: 7bit On Thursday 10 January 2013 12:12:50 Andreas Longwitz wrote: > Hans Petter Selasky wrote: > > 1. Problem: "last byte" on incomig D-channel frames: > > Can you add prints to track the "sc->sc_d1r_fifo_keep_len" and "sc- > > sc_d1r_fifo_strip_len" variables? > > Yes. With the following two prints > I see. Can you try the attached patch? Revert the previous ones. > > Possibly some FIFO status bits are not cleared like they should, and then > > the stream stops. > > I know that some chips have a filter which stops the stream on HDLC idle > > bytes. > > It might also be worth to try dumping the register from which the > > HSCX_LEN comes from, if it is 2x32=64 bytes, because I mask that value > > with 0x1F. > > I did not find a masking with 0x1F, or do you mean 0x3F (typing error) ? Yes. > > I will do more work on B-channel analysis. It would be very helpful for > me, if you can give an answer to the following question: > > After the B-channel is established, the other side starts sending the > following data packet (from isdndecode of the other side): > > -- TE->NT - unit:00 frame:351318 - time:10.01 11:34:12.595168 - > length:18 ---- > B01:000 ff 03 c0 21 01 d8 00 0e 05 06 31 13 cd b3 03 04 > B01:010 c0 23 > > What should we read in avm_pci_b_status_read() with > > if(temp == 0) temp = 32; > /* read FIFO */ > bus_space_read_multi_4(t, h, offset + HSCX_FIFO, > (u_int32_t *)sc->sc_buffer, (temp + 3) / 4); > > if everything works correct and how many interrupts can we expect for > the message of 18 bytes ? You should either get 32+32+32+32+32 and so on, or you will get: (18+((number_of_bit_stuffings+7)/8) +2) bytes. --HPS --Boundary-00=_wKv7Q3MCbSnoBf5 Content-Type: text/x-patch; charset="iso-8859-15"; name="avm_pci.diff" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="avm_pci.diff" Index: src/sys/i4b/layer1/ihfc3/i4b_avm_pci.h =================================================================== --- src/sys/i4b/layer1/ihfc3/i4b_avm_pci.h (revision 2522) +++ src/sys/i4b/layer1/ihfc3/i4b_avm_pci.h (working copy) @@ -113,9 +113,19 @@ if(reg & 0x80) { + IHFC_LEN_T x; + + /* sanity check */ + if (len > (sizeof(sc->sc_buffer) / 4)) + len = (sizeof(sc->sc_buffer) / 4); + /* ISAC-SX REGISTER */ bus_space_write_4(t, h, REG_ISACSX_INDEX, (reg & 0x7F)); - bus_space_read_multi_1(t, h, REG_ISACSX_DATA, ptr, len); + bus_space_read_multi_4(t, h, REG_ISACSX_DATA, + (u_int32_t *)sc->sc_buffer, len); + + for (x = 0; x != len; x++) + ptr[x] = ((u_int32_t *)sc->sc_buffer)[x]; } else { @@ -148,9 +158,19 @@ if(reg & 0x80) { + IHFC_LEN_T x; + + /* sanity check */ + if (len > (sizeof(sc->sc_buffer) / 4)) + len = (sizeof(sc->sc_buffer) / 4); + + for (x = 0; x != len; x++) + ((u_int32_t *)sc->sc_buffer)[x] = ptr[x]; + /* ISAC-SX REGISTER */ bus_space_write_4(t, h, REG_ISACSX_INDEX, (reg & 0x7F)); - bus_space_write_multi_1(t, h, REG_ISACSX_DATA, ptr, len); + bus_space_write_multi_4(t, h, REG_ISACSX_DATA, + (u_int32_t *)sc->sc_buffer, len); } else { @@ -214,9 +234,6 @@ avm_pci_b_status_read(ihfc_sc_t *sc, ihfc_fifo_t *f, u_int8_t offset) { IPAC_BUS_VAR(sc); - - /* allocate a buffer on the stack */ - u_int8_t buffer[0x40 + 0x10] __aligned(4); u_int8_t temp; /* read status */ @@ -258,9 +275,9 @@ /* read FIFO */ bus_space_read_multi_4(t, h, offset + HSCX_FIFO, - (void *)&buffer[0], (temp+3)/4); + (u_int32_t *)sc->sc_buffer, (temp + 3) / 4); - (f+receive)->Z_ptr = &buffer[0]; + (f+receive)->Z_ptr = (u_int8_t *)sc->sc_buffer; (f+receive)->Z_chip = temp; /* call filter */ @@ -280,7 +297,7 @@ temp = 32; (f+transmit)->i_ista &= ~(I_ISTA_ERR|I_ISTA_XPR); - (f+transmit)->Z_ptr = &buffer[0]; + (f+transmit)->Z_ptr = (u_int8_t *)sc->sc_buffer; (f+transmit)->Z_chip = temp; /* call filter */ @@ -300,9 +317,16 @@ /* update state */ (f+transmit)->state &= ~(ST_FRAME_ERROR|ST_FRAME_END); + /* write FIFO length */ + bus_space_write_1(t, h, offset + HSCX_LEN, 0); + + /* write FIFO command */ + bus_space_write_1(t, h, offset + HSCX_STAT, + HSCX_CMD_XME); + /* write FIFO */ bus_space_write_multi_4(t, h, offset + HSCX_FIFO, - (void *)&buffer[0], (temp+3)/4); + (u_int32_t *)sc->sc_buffer, (temp + 3) / 4); } return; } @@ -604,7 +628,7 @@ I4B_DBASE_ADD(i4b_option_value , 0); I4B_DBASE_ADD(d_fifo_map[d1t] , FM2OFF (isac_fifo_map[0])); - I4B_DBASE_ADD(d_fifo_map[d1r] , FM2OFF (isac_fifo_map[0])); + I4B_DBASE_ADD(d_fifo_map[d1r] , FM2OFF (isac_remove_stat_fifo_map[0])); I4B_DBASE_ADD(o_RES_IRQ_0 , 1); /* enable */ I4B_DBASE_ADD(o_RES_MEMORY_0 , 1); /* enable */ Index: src/sys/i4b/layer1/ihfc3/i4b_isac.h =================================================================== --- src/sys/i4b/layer1/ihfc3/i4b_isac.h (revision 2522) +++ src/sys/i4b/layer1/ihfc3/i4b_isac.h (working copy) @@ -330,6 +330,20 @@ * fifo maps. *---------------------------------------------------------------------------*/ +I4B_FIFO_MAP_DECLARE(isac_remove_stat_fifo_map[]) = +{ + /* + * IPAC D-channel FIFO map + */ + + [ 0].i= + { + .Zdata = REG_isac_data, + .remove_stat = 1, /* present */ + .block_size = 0x20, /* = 32 bytes */ + }, +}; + I4B_FIFO_MAP_DECLARE(isac_fifo_map[]) = { /* Index: src/sys/i4b/layer1/ihfc3/i4b_ihfc2.h =================================================================== --- src/sys/i4b/layer1/ihfc3/i4b_ihfc2.h (revision 2522) +++ src/sys/i4b/layer1/ihfc3/i4b_ihfc2.h (working copy) @@ -2583,7 +2583,7 @@ struct usb_callout sc_pollout_timr; /* T50 ms */ struct usb_callout sc_pollout_timr_wait; /* T125 us */ - u_int8_t sc_buffer[1024]; + u_int8_t sc_buffer[1024] __aligned(4); struct sc_fifo * sc_fifo_select_last; /* used by * FIFO_SELECT(,) --Boundary-00=_wKv7Q3MCbSnoBf5--