From owner-freebsd-current Thu Sep 12 05:23:38 1996 Return-Path: owner-current Received: (from root@localhost) by freefall.freebsd.org (8.7.5/8.7.3) id FAA03103 for current-outgoing; Thu, 12 Sep 1996 05:23:38 -0700 (PDT) Received: from vanuata.dcs.gla.ac.uk (vanuata.dcs.gla.ac.uk [130.209.240.50]) by freefall.freebsd.org (8.7.5/8.7.3) with ESMTP id FAA03098 for ; Thu, 12 Sep 1996 05:23:34 -0700 (PDT) Message-Id: <199609121223.FAA03098@freefall.freebsd.org> Received: from solander.dcs.gla.ac.uk by vanuata.dcs.gla.ac.uk with LOCAL SMTP (PP); Thu, 12 Sep 1996 13:21:53 +0100 To: KATO Takenori cc: dg@Root.COM, current@freebsd.org Subject: Re: patch for Cyrix/Ti 486SLC/DLC CPU bug In-reply-to: Your message of "Thu, 12 Sep 1996 00:32:10 +0900." <199609111532.AAA02373@marble.eps.nagoya-u.ac.jp> Date: Thu, 12 Sep 1996 13:21:51 +0100 From: Simon Marlow Sender: owner-current@freebsd.org X-Loop: FreeBSD.org Precedence: bulk > Sorry, I lost Cyrix's data book and I couldn't check official > information. I think Cyrix chip supports selective TLB update, but it > may have bug and LMSW instruction fails in some cases. I think this > depends on the version of CPU because some Cyrix machines works without > pmap.c change. As a data point, my Cyrix 486DLC 2/80 appears to work fine without these patches. It's probably quite a recent stepping, though. Cheers, Simon -- Simon Marlow simonm@dcs.gla.ac.uk Research Assistant http://www.dcs.gla.ac.uk/~simonm/ finger for PGP public key