From owner-freebsd-chat Wed May 17 8:29:34 2000 Delivered-To: freebsd-chat@freebsd.org Received: from mail.rdc1.va.home.com (ha1.rdc1.va.home.com [24.2.32.66]) by hub.freebsd.org (Postfix) with ESMTP id D5EC037BC4E for ; Wed, 17 May 2000 08:29:30 -0700 (PDT) (envelope-from jhb@FreeBSD.org) Received: from john.baldwin.cx ([24.6.244.187]) by mail.rdc1.va.home.com (InterMail vM.4.01.02.00 201-229-116) with ESMTP id <20000517152930.IMAD22611.mail.rdc1.va.home.com@john.baldwin.cx>; Wed, 17 May 2000 08:29:30 -0700 Content-Length: 2900 X-Mailer: XFMail 1.4.0 on FreeBSD X-Priority: 3 (Normal) Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 8bit MIME-Version: 1.0 In-Reply-To: <20000516182723.A233@parish> Date: Wed, 17 May 2000 11:30:13 -0400 (EDT) From: John Baldwin To: Mark Ovens Subject: Re: Yowza! Cc: chat@freebsd.org, Alfred Perlstein , Kris Kirby , Conrad Sabatier Message-Id: <20000517152930.IMAD22611.mail.rdc1.va.home.com@john.baldwin.cx> Sender: owner-freebsd-chat@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.org On 16-May-00 Mark Ovens wrote: > On Mon, May 15, 2000 at 07:39:11PM -0500, Conrad Sabatier wrote: >> FreeBSD 4.0-STABLE #0: Sat May 13 19:05:13 CDT 2000 >> conrads@cx344940-a.meta1.la.home.com:/usr/src/sys/compile/MYKERNEL >> Timecounter "i8254" frequency 1193182 Hz >> CPU: AMD Athlon(tm) Processor (998.07-MHz 686-class CPU) >> Origin = "AuthenticAMD" Id = 0x622 Stepping = 2 >> Features=0x183f9ff> MCA,CMOV,PAT,PSE36,MMX,FXSR> > > Just as a slight aside; is there a list anywhere of what all those > Feature codes mean? Probably buried somewhere in Intel's manuals. FPU - Chip has a Floating-point Co-processor VME - Virtual Mode Extensions - provides a virtual Interrupt Flag for vm86 mode tasks DE - Debug Exception (I think), has to do with the debug registers PSE - Page Size Extension - allows a 4mb page to be used directly from the page directory instead of having a table of 4k pages TSC - Supports the time stamp counter, specifically the RDTSC instruction to read it MSR - This processors has MSR's, and supports accessing them via RDMSR and WRMSR PAE - Page Address Extensions - this allows the processor to address 64 Gig of memory instead of just 4 Gig by squeezing some extra bits out of the page directory entries. When used with PSE, the large pages are 2mb in length instead of 4mb. MCE - Supports the Machine Check Exception. CX8 - Supports the CMPXCHG8B instruction. SEP - hmm, not sure MTRR - Supports Memory Type Range Registes, which allow you to specify the cache policy used on memory ranges. PGE - Page Global Enable. Allows you to specify that pages or page-tables are global pages and are present (and the same) in all of the page directories. Thus when CR3 is changed to point to a new page directory, page tables or pages that are marked global do not have their entries flushed from the TLB. MCA - Machine Check Architecture, not quite sure what it is. CMOV - Conditional MOV instructions. Supports a set of MOV instructions that only perform the MOV if a condition is met. For example, CMOVZ %al, %bl is equivalent to "jnz @@; mov %al, %bl ; @@:" PAT - Not sure. PSE36 - Supports another variation of PSE that supports 36-bit addresssing. However, this provides this support by using only 4mb pages above the 4 gig mark. This is thus quite wasteful, and quite an ugly hack. MMX - Supports MMX. FXSR - No idea. >> AMD Features=0xc0400000 AMIE - No idea. DSP - No idea. 3DNow! - Supports the AMD 3DNow! extensions. SYSCALL - (seen on K6-[23]'s), supports AMD's SYSCALL instruction. HTH -- John Baldwin -- http://www.FreeBSD.org/~jhb/ PGP Key: http://www.cslab.vt.edu/~jobaldwi/pgpkey.asc "Power Users Use the Power to Serve!" - http://www.FreeBSD.org/ To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-chat" in the body of the message