Skip site navigation (1)Skip section navigation (2)
Date:      Sun, 8 Jul 2012 21:21:45 +0000 (UTC)
From:      Robert Watson <rwatson@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-9@freebsd.org
Subject:   svn commit: r238266 - stable/9/sys/mips/mips
Message-ID:  <201207082121.q68LLjZq075268@svn.freebsd.org>

next in thread | raw e-mail | index | archive | help
Author: rwatson
Date: Sun Jul  8 21:21:45 2012
New Revision: 238266
URL: http://svn.freebsd.org/changeset/base/238266

Log:
  Merge r231712 from head to stable/9:
  
    When initialising the CP0 status register during boot on 64-bit MIPS,
    set all three of the kernel, supervisor, and user-mode 64-bit mode
    flags.  While FreeBSD does not currently use the supervisor ring (and
    hence this is effectively a NOP on most systems), doing this avoids
    triggering an exception on 64-bit MIPS CPUs that don't support 32-bit
    compatibility mode, and therefore don't allow clearing the SX bit.
  
    Reviewed by:        gonzo
    Sponsored by:       DARPA, SRI International
  
  Approved by:  re (kib)

Modified:
  stable/9/sys/mips/mips/locore.S
Directory Properties:
  stable/9/sys/   (props changed)

Modified: stable/9/sys/mips/mips/locore.S
==============================================================================
--- stable/9/sys/mips/mips/locore.S	Sun Jul  8 21:13:04 2012	(r238265)
+++ stable/9/sys/mips/mips/locore.S	Sun Jul  8 21:21:45 2012	(r238266)
@@ -118,7 +118,7 @@ VECTOR(_locore, unknown)
 	 */
 	li	t1, MIPS_SR_COP_1_BIT
 #ifdef __mips_n64
-	or	t1, MIPS_SR_KX | MIPS_SR_UX
+	or	t1, MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX
 #endif
 #endif
 	/*



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201207082121.q68LLjZq075268>