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From: Pyun YongHyeon <yongari@FreeBSD.org>
Date: Wed, 23 Dec 2009 17:54:24 +0000 (UTC)
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Subject: cvs commit: src/sys/dev/ste if_ste.c
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yongari     2009-12-23 17:54:24 UTC

  FreeBSD src repository

  Modified files:
    sys/dev/ste          if_ste.c 
  Log:
  SVN rev 200905 on 2009-12-23 17:54:24Z by yongari
  
  Reimplement controller reset. Datasheet says full reset takes about
  1ms. Since we switched to memory register mapping make sure to
  flush PCI posted write by reading the register again.
  While I'm here add additional delays in loop while driver waits the
  completion of the reset.
  
  Revision  Changes    Path
  1.20      +15 -8     src/sys/dev/ste/if_ste.c