From owner-freebsd-ppc@freebsd.org Tue Jan 17 19:49:28 2017 Return-Path: Delivered-To: freebsd-ppc@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 27A02CB4B91; Tue, 17 Jan 2017 19:49:28 +0000 (UTC) (envelope-from rdivacky@vlakno.cz) Received: from vlakno.cz (mail.vlakno.cz [91.217.96.224]) by mx1.freebsd.org (Postfix) with ESMTP id E3CAF1E6D; Tue, 17 Jan 2017 19:49:27 +0000 (UTC) (envelope-from rdivacky@vlakno.cz) Received: by vlakno.cz (Postfix, from userid 1002) id 9C74F12CB9F; Tue, 17 Jan 2017 20:46:51 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=vlakno.cz; s=mail; t=1484682411; bh=3Ml3gY/QKFO0dHMw4929LDJXxsyMwi2dL9NiY46f0x8=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=PjzjUGWmJly+QO0Oc+NIavGY+ZlKO2+Cut1BqYK5QRgX+66gvFe7uSW64laLb8omW A18mvJ2iSBsjk2Z58ucMZLHJZZl6mS/kMbjop1JaBYc5u2enIoMKM0y5Mb17BTok7j Im7J80qcdMc9wooBm0GYOfI/joDZttfA1iw8OeK8= Date: Tue, 17 Jan 2017 20:46:51 +0100 From: Roman Divacky To: Justin Hibbits Cc: Mark Millard , FreeBSD Toolchain , FreeBSD PowerPC ML Subject: Re: clang 3.9.0 buildkernel on old powerpc64's vs. trying to build hwpmc_e500.o and the like. . . Message-ID: <20170117194651.GA88907@vlakno.cz> References: <300CB7A2-34BB-407F-B2E9-D263B119A989@dsl-only.net> <20161205161904.GA7889@vlakno.cz> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.7.2 (2016-11-26) X-BeenThere: freebsd-ppc@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Porting FreeBSD to the PowerPC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 17 Jan 2017 19:49:28 -0000 Are you sure? My coy of PowerISA lists the numbers that I used? What makes you think it should be shifted by one bit? On Mon, Jan 16, 2017 at 08:45:58PM -0600, Justin Hibbits wrote: > The patch is incorrect, the 'xo' values are off by one bit (inline > change): > > > On Dec 5, 2016, at 10:19 AM, Roman Divacky wrote: > > > Can you try this patch? > > > > Index: llvm/lib/Target/PowerPC/PPCInstrInfo.td > > =================================================================== > > --- llvm/lib/Target/PowerPC/PPCInstrInfo.td (revision 288675) > > +++ llvm/lib/Target/PowerPC/PPCInstrInfo.td (working copy) > > @@ -2373,6 +2373,12 @@ > > def MFTB : XFXForm_1<31, 371, (outs gprc:$RT), (ins i32imm:$SPR), > > "mftb $RT, $SPR", IIC_SprMFTB>; > > > > +def MFPMR : XFXForm_1<31, 334, (outs gprc:$RT), (ins i32imm:$PMRN), > > 334 should be 167 > > > + "mfpmr $RT, $PMRN", IIC_IntGeneral>; > > + > > +def MTPMR : XFXForm_1<31, 462, (outs), (ins i32imm:$PMRN, gprc:$RS), > > + "mtpmr $PMRN, $RS", IIC_IntGeneral>; > > 462 should be 231. > > > + > > // A pseudo-instruction used to implement the read of the 64-bit > > cycle counter > > // on a 32-bit target. > > let hasSideEffects = 1, usesCustomInserter = 1 in > > > > I'll have a patch ready for LLVM review within a week or so, including > some level of scheduling. > > - Justin