From owner-cvs-src-old@FreeBSD.ORG Wed Sep 1 19:33:57 2010 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id D192F10656C7 for ; Wed, 1 Sep 2010 19:33:57 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 89D308FC15 for ; Wed, 1 Sep 2010 19:33:57 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.4/8.14.4) with ESMTP id o81JXvNW027810 for ; Wed, 1 Sep 2010 19:33:57 GMT (envelope-from yongari@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.4/8.14.4/Submit) id o81JXvvu027809 for cvs-src-old@freebsd.org; Wed, 1 Sep 2010 19:33:57 GMT (envelope-from yongari@repoman.freebsd.org) Message-Id: <201009011933.o81JXvvu027809@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to yongari@repoman.freebsd.org using -f From: Pyun YongHyeon Date: Wed, 1 Sep 2010 19:33:40 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: HEAD Subject: cvs commit: src/sys/dev/sis if_sis.c if_sisreg.h X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 01 Sep 2010 19:33:57 -0000 yongari 2010-09-01 19:33:40 UTC FreeBSD src repository Modified files: sys/dev/sis if_sis.c if_sisreg.h Log: SVN rev 212109 on 2010-09-01 19:33:40Z by yongari bus_dma(9) cleanup. o Enforce TX/RX descriptor ring alignment. NS data sheet says the controller needs 4 bytes alignment but use 16 to cover both SiS and NS controllers. I don't have SiS data sheet so I'm not sure what is alignment restriction of SiS controller but 16 would be enough because it's larger than the size of a TX/RX descriptor. Previously sis(4) ignored the alignment restriction. o Enforce RX buffer alignment, 4. Previously sis(4) ignored RX buffer alignment restriction. o Limit number of TX DMA segment to be used to 16. It seems controller has no restriction on number of DMA segments but using more than 16 looks resource waste. o Collapse long mbuf chains with m_collapse(9) instead of calling expensive m_defrag(9). o TX/RX side bus_dmamap_load_mbuf_sg(9) support and remove unnecessary callbacks. o Initial endianness support. o Prefer local alignment fixup code to m_devget(9). o Pre-allocate TX/RX mbuf DMA maps instead of creating/destroying these maps in fast TX/RX path. On non-x86 architectures, this is very expensive operation and there is no need to do that. o Add missing bus_dmamap_sync(9) in TX/RX path. o watchdog is now unarmed only when there are no pending frames on controller. Previously sis(4) blindly unarmed watchdog without checking the number of queued frames. o For efficiency, loaded DMA map is reused for error frames. o DMA map loading failure is now gracefully handled. Previously sis(4) ignored any DMA map loading errors. o Nuke unused macros which are not appropriate for endianness operation. o Stop embedding driver maintained structures into descriptor rings. Because TX/RX descriptor structures are shared between host and controller, frequent bus_dmamap_sync(9) operations are required in fast path. Embedding driver structures will increase the size of DMA map which in turn will slow down performance. Revision Changes Path 1.14 +462 -396 src/sys/dev/sis/if_sis.c 1.4 +36 -25 src/sys/dev/sis/if_sisreg.h