From owner-freebsd-hackers@FreeBSD.ORG Thu Aug 27 17:45:28 2009 Return-Path: Delivered-To: hackers@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 7CF811065694 for ; Thu, 27 Aug 2009 17:45:28 +0000 (UTC) (envelope-from steve@Watt.COM) Received: from wattres.watt.com (wattres.watt.com [66.93.133.130]) by mx1.freebsd.org (Postfix) with ESMTP id 5D5AB8FC39 for ; Thu, 27 Aug 2009 17:45:28 +0000 (UTC) Received: from wattres.watt.com (localhost.watt.com [127.0.0.1]) by wattres.watt.com (8.14.3/8.14.3) with ESMTP id n7RHjRSu036946 for ; Thu, 27 Aug 2009 10:45:27 -0700 (PDT) (envelope-from steve@wattres.watt.com) Received: (from steve@localhost) by wattres.watt.com (8.14.3/8.14.3/Submit) id n7RHjR7J036945 for hackers@freebsd.org; Thu, 27 Aug 2009 10:45:27 -0700 (PDT) (envelope-from steve) Message-Id: <200908271745.n7RHjR7J036945@wattres.watt.com> X-Newsgroups: local.freebsd-hackers In-Reply-To: <200908271130.18073.erich@apsara.com.sg> From: steve@Watt.COM (Steve Watt) References: <200908262253.n7QMrauP063683@wattres.watt.com> Organization: Watt Consultants, San Jose, CA, USA Date: Thu, 27 Aug 2009 10:45:27 -0700 X-Mailer: Mail User's Shell (7.2.6 beta(5) 10/07/98) To: hackers@freebsd.org X-Archived: 1251395127.824430372@wattres.Watt.COM X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.0.1 (wattres.watt.com [127.0.0.1]); Thu, 27 Aug 2009 10:45:27 -0700 (PDT) Cc: Subject: Re: enable ECC in OS code? X-BeenThere: freebsd-hackers@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Technical Discussions relating to FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 27 Aug 2009 17:45:28 -0000 In <200908271130.18073.erich@apsara.com.sg>, erich@apsara.com.sg wrote: >Hi, > >On 27 August 2009 am 06:53:36 Steve Watt wrote: >> In <4A954A35.4030207@icyb.net.ua>, avg@icyb.net.ua wrote: >> >Assuming that ECC data lanes are connected between the two on >> > motherboard, and given that BIOS doesn't perform any ECC >> > setup (nor there is any option to control that) - would it be >> > possible to turn on ECC from OS code? Or is it too late in >> > the game already? >> >> It's about 100 times easier to have the BIOS do this. First >> off, it's usually quite specific to the chip set exactly how to > >how should it be done at OS level at all when the OS is loaded >into RAM? > >I do not thing that normal PC hardware is capable of handling >this. > >Only code running in a ROM can do this. Disable the ECC error reporting and copy memory back to itself? Again, quite controller-specific. That said, the BIOS should do it, and any that doesn't is broken. -- Steve Watt KD6GGD PP-ASEL-IA ICBM: 121W 56' 57.5" / 37N 20' 15.3" Internet: steve @ Watt.COM Whois: SW32-ARIN Free time? There's no such thing. It just comes in varying prices...