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Date:      Sat, 12 Jul 2014 19:54:04 +0300
From:      Mihai Carabas <mihai.carabas@gmail.com>
To:        soc-status@freebsd.org
Subject:   Re: [GSOC] bhyve instruction caching
Message-ID:  <CANg1yUszaxnxjxqUDXGtwxA%2BAB%2BPs9PPyn8-LbwiC89e-iQpOg@mail.gmail.com>
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Hi,

> At the end of the week I will come with some new results with the
> microbenchmarking.
So I've redone the microbenchmarking tests and the page-table
protection didn't cause a significant performance degradation  (the
new locking for the cache logic correlated with the more frequent
cache evictions): for 1000000 accesses to the lapic-id we have an
average of 6800 ticks per VM_EXIT for an instruction emulation (before
writeprotecting the page tables it was 6200). The numbers WITHOUT
cache instruction are at about 10000~10400. So, when watching at the
microbenchmarking we have an improvement of ~35%.

>
> Also I'm looking for new real-world benchmarks to see where we can
> benefict a lot from the instruction caching feature.
I've started doing to kind of benchmarks:
* CPU intensive (ex: a bash script that increments in a loop a variable)
* benchmarks that creates lot of short processes (not CPU intensive
but short running I/O intensive): make buildworld -j2

I will come with some concrete results in the next week. Meanwhile I
will add some new statistics like "Cache hits" and "Cache evictions"
to see how my cache behavious in each of the benchmarks.

Thanks,
Mihai


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