Date: Wed, 23 Sep 2015 22:59:30 +0200 From: Marius Strobl <marius@alchemy.franken.de> To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Alexey Dokuchaev <danfe@FreeBSD.org>, "freebsd-sparc64@freebsd.org" <freebsd-sparc64@freebsd.org> Subject: Re: PCI range checking under qemu-system-sparc64 Message-ID: <20150923205930.GA15050@alchemy.franken.de> In-Reply-To: <20150923204336.GO18789@alchemy.franken.de> References: <55F9C2B8.7030605@ilande.co.uk> <20150916211914.GD18789@alchemy.franken.de> <20150917082817.GA71811@FreeBSD.org> <55FBB662.4080708@ilande.co.uk> <20150919211420.GK18789@alchemy.franken.de> <55FDEA3C.1010804@ilande.co.uk> <20150920043630.GA36162@FreeBSD.org> <20150922221404.GA81100@alchemy.franken.de> <560260A9.9010505@ilande.co.uk> <20150923204336.GO18789@alchemy.franken.de>
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On Wed, Sep 23, 2015 at 10:43:36PM +0200, Marius Strobl wrote: > On Wed, Sep 23, 2015 at 09:19:53AM +0100, Mark Cave-Ayland wrote: > > > > I've had a quick look through the relevant PDFs and the definitions I > > have for tick/stick are this: > > > > tick: > > bit 63: NPT (Non-Privileged Trap enable - defaults to 1) > > bits 62 - 0: CPU cycle counter > > > > tick_cmpr: > > bit 63: Interrupt disable (1 = no interrupt) > > bits 62 - 0: counter compare value > > > > stick: > > bit 63: Reserved (reads 0, no write) > > bits 62 - 0: stick register count value > > I cannot confirm that, the specification for the first sun4u CPU > having a %stick register (UltraSPARC III, see 1, p. 6-105) up to > the latest architecture specification (see 2, p. 60) say that bit > 32 of %stick is NPT, just as with %tick. Same for the specification ^^ Err, typo, bit 63 that is of course. Marius
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