Date: Sat, 4 Jun 2022 12:01:22 GMT From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: a13b6fc61908 - stable/13 - Merge llvm-project release/14.x llvmorg-14.0.3-0-g1f9140064dfb Message-ID: <202206041201.254C1MwO093881@gitrepo.freebsd.org>
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The branch stable/13 has been updated by dim: URL: https://cgit.FreeBSD.org/src/commit/?id=a13b6fc61908fd6afa460b88f94e4a67be74bb9a commit a13b6fc61908fd6afa460b88f94e4a67be74bb9a Author: Dimitry Andric <dim@FreeBSD.org> AuthorDate: 2022-04-28 18:32:24 +0000 Commit: Dimitry Andric <dim@FreeBSD.org> CommitDate: 2022-06-04 12:00:08 +0000 Merge llvm-project release/14.x llvmorg-14.0.3-0-g1f9140064dfb This updates llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and openmp to llvmorg-14.0.3-0-g1f9140064dfb. PR: 261742 MFC after: 2 weeks (cherry picked from commit 3a9a9c0ca44ec535dcf73fe8462bee458e54814b) --- ObsoleteFiles.inc | 4 +- .../clang/include/clang/Driver/Options.td | 3 +- .../clang/include/clang/Interpreter/Interpreter.h | 2 + contrib/llvm-project/clang/lib/CodeGen/CGExpr.cpp | 14 +- .../clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 3 + .../clang/lib/Driver/ToolChains/OpenBSD.cpp | 9 + .../clang/lib/Driver/ToolChains/OpenBSD.h | 4 +- .../clang/lib/Interpreter/IncrementalExecutor.h | 1 + .../clang/lib/Interpreter/Interpreter.cpp | 6 + .../clang/utils/TableGen/NeonEmitter.cpp | 23 +- .../compiler-rt/lib/asan/asan_linux.cpp | 30 +- .../compiler-rt/lib/scudo/scudo_allocator.cpp | 4 +- .../compiler-rt/lib/scudo/scudo_crc32.cpp | 4 +- .../compiler-rt/lib/scudo/scudo_crc32.h | 12 +- .../compiler-rt/lib/scudo/standalone/checksum.h | 8 +- .../compiler-rt/lib/scudo/standalone/chunk.h | 4 +- .../compiler-rt/lib/scudo/standalone/crc32_hw.cpp | 4 +- contrib/llvm-project/libcxx/src/random.cpp | 2 +- contrib/llvm-project/lld/COFF/DebugTypes.cpp | 19 +- contrib/llvm-project/lld/ELF/SyntheticSections.h | 4 +- contrib/llvm-project/lld/ELF/Writer.cpp | 41 +- .../llvm/include/llvm/CodeGen/FastISel.h | 7 + .../llvm/include/llvm/CodeGen/SelectionDAG.h | 13 + .../llvm/include/llvm/CodeGen/SelectionDAGISel.h | 1 + .../llvm/lib/CodeGen/MachineFunction.cpp | 3 - .../llvm/lib/CodeGen/SelectionDAG/FastISel.cpp | 4 +- .../llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 5 +- .../llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h | 3 +- .../lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp | 3 +- .../CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp | 3 +- .../llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 12 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 5 +- .../lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 10 +- .../llvm-project/llvm/lib/MC/ELFObjectWriter.cpp | 1 + contrib/llvm-project/llvm/lib/Object/ELF.cpp | 2 - .../llvm/lib/Support/AArch64TargetParser.cpp | 2 + .../llvm/lib/Target/AArch64/AArch64.td | 12 +- .../llvm/lib/Target/AArch64/AArch64CollectLOH.cpp | 2 +- .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 34 ++ .../llvm/lib/Target/AArch64/AArch64FastISel.cpp | 8 + .../lib/Target/AArch64/AArch64ISelLowering.cpp | 163 +++--- .../llvm/lib/Target/AArch64/AArch64ISelLowering.h | 9 +- .../llvm/lib/Target/AArch64/AArch64InstrInfo.td | 11 + .../llvm/lib/Target/AArch64/AArch64Subtarget.h | 6 + .../Target/AArch64/AsmParser/AArch64AsmParser.cpp | 16 +- .../Target/AArch64/GISel/AArch64CallLowering.cpp | 12 +- .../AArch64/GISel/AArch64PreLegalizerCombiner.cpp | 7 +- .../AArch64/MCTargetDesc/AArch64ELFStreamer.cpp | 1 + .../lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp | 63 +-- .../Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 2 + .../PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp | 2 + .../Target/PowerPC/MCTargetDesc/PPCFixupKinds.h | 4 + .../PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp | 4 +- .../lib/Target/PowerPC/MCTargetDesc/PPCMCExpr.cpp | 13 +- .../llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 1 + .../llvm/lib/Target/PowerPC/PPCInstrInfo.td | 4 +- .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 8 +- .../lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp | 54 +- .../llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 23 +- .../llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 71 +-- .../lib/Target/RISCV/RISCVMachineFunctionInfo.cpp | 30 + .../lib/Target/RISCV/RISCVMachineFunctionInfo.h | 25 + .../llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 23 + .../llvm/lib/Target/RISCV/RISCVTargetMachine.h | 8 + .../llvm/lib/Target/X86/X86ISelLowering.cpp | 24 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 6 + .../Transforms/InstCombine/InstCombineSelect.cpp | 17 + .../lib/Transforms/Vectorize/LoopVectorize.cpp | 37 +- .../lib/Transforms/Vectorize/VectorCombine.cpp | 8 +- .../llvm/tools/llvm-objdump/ELFDump.cpp | 8 +- etc/mtree/BSD.debug.dist | 2 +- etc/mtree/BSD.usr.dist | 2 +- lib/clang/headers/Makefile | 2 +- lib/clang/include/VCSVersion.inc | 6 +- lib/clang/include/clang/Basic/Version.inc | 6 +- lib/clang/include/clang/Config/config.h | 2 +- lib/clang/include/lld/Common/Version.inc | 4 +- lib/clang/include/lldb/Version/Version.inc | 6 +- lib/clang/include/llvm/Config/TargetMCAs.def | 4 + lib/clang/include/llvm/Config/config.h | 4 +- lib/clang/include/llvm/Config/llvm-config.h | 4 +- lib/clang/include/llvm/Support/VCSRevision.h | 2 +- lib/clang/libllvm/Makefile | 2 + lib/libclang_rt/compiler-rt-vars.mk | 2 +- lib/libclang_rt/include/Makefile | 1 + lib/libclang_rt/profile/Makefile | 1 + sys/sys/param.h | 2 +- tools/build/mk/OptionalObsoleteFiles.inc | 602 +++++++++++---------- 88 files changed, 985 insertions(+), 660 deletions(-) diff --git a/ObsoleteFiles.inc b/ObsoleteFiles.inc index 9ae60b4631d9..4b4b4bb96a65 100644 --- a/ObsoleteFiles.inc +++ b/ObsoleteFiles.inc @@ -36,7 +36,7 @@ # xargs -n1 | sort | uniq -d; # done -# 20220604: new clang import which bumps version from 13.0.0 to 14.0.0 +# 20220604: new clang import which bumps version from 13.0.0 to 14.0.3 OLD_FILES+=usr/lib/clang/13.0.0/include/cuda_wrappers/algorithm OLD_FILES+=usr/lib/clang/13.0.0/include/cuda_wrappers/complex OLD_FILES+=usr/lib/clang/13.0.0/include/cuda_wrappers/new @@ -333,7 +333,7 @@ OLD_DIRS+=usr/lib/clang/13.0.0/lib/freebsd OLD_DIRS+=usr/lib/clang/13.0.0/lib OLD_DIRS+=usr/lib/clang/13.0.0 -# 20220604: new libc++ import which bumps version from 13.0.0 to 14.0.0 +# 20220604: new libc++ import which bumps version from 13.0.0 to 14.0.3 OLD_FILES+=usr/include/c++/v1/__function_like.h OLD_FILES+=usr/include/c++/v1/__memory/pointer_safety.h OLD_FILES+=usr/include/c++/v1/__utility/__decay_copy.h diff --git a/contrib/llvm-project/clang/include/clang/Driver/Options.td b/contrib/llvm-project/clang/include/clang/Driver/Options.td index 53e68ed2cef9..e0d215840714 100644 --- a/contrib/llvm-project/clang/include/clang/Driver/Options.td +++ b/contrib/llvm-project/clang/include/clang/Driver/Options.td @@ -3372,7 +3372,7 @@ def mmark_bti_property : Flag<["-"], "mmark-bti-property">, def mno_bti_at_return_twice : Flag<["-"], "mno-bti-at-return-twice">, Group<m_arm_Features_Group>, HelpText<"Do not add a BTI instruction after a setjmp or other" - " return-twice construct (Arm only)">; + " return-twice construct (Arm/AArch64 only)">; foreach i = {1-31} in def ffixed_x#i : Flag<["-"], "ffixed-x"#i>, Group<m_Group>, @@ -3400,6 +3400,7 @@ def msign_return_address_EQ : Joined<["-"], "msign-return-address=">, Flags<[CC1Option]>, Group<m_Group>, Values<"none,all,non-leaf">, HelpText<"Select return address signing scope">; def mbranch_protection_EQ : Joined<["-"], "mbranch-protection=">, + Group<m_Group>, HelpText<"Enforce targets of indirect branches and function returns">; def mharden_sls_EQ : Joined<["-"], "mharden-sls=">, diff --git a/contrib/llvm-project/clang/include/clang/Interpreter/Interpreter.h b/contrib/llvm-project/clang/include/clang/Interpreter/Interpreter.h index 721a649deb43..f2fdb90f5ba4 100644 --- a/contrib/llvm-project/clang/include/clang/Interpreter/Interpreter.h +++ b/contrib/llvm-project/clang/include/clang/Interpreter/Interpreter.h @@ -26,6 +26,7 @@ namespace llvm { namespace orc { +class LLJIT; class ThreadSafeContext; } } // namespace llvm @@ -56,6 +57,7 @@ public: static llvm::Expected<std::unique_ptr<Interpreter>> create(std::unique_ptr<CompilerInstance> CI); const CompilerInstance *getCompilerInstance() const; + const llvm::orc::LLJIT *getExecutionEngine() const; llvm::Expected<PartialTranslationUnit &> Parse(llvm::StringRef Code); llvm::Error Execute(PartialTranslationUnit &T); llvm::Error ParseAndExecute(llvm::StringRef Code) { diff --git a/contrib/llvm-project/clang/lib/CodeGen/CGExpr.cpp b/contrib/llvm-project/clang/lib/CodeGen/CGExpr.cpp index bb5d18b74894..2a9b108c31bc 100644 --- a/contrib/llvm-project/clang/lib/CodeGen/CGExpr.cpp +++ b/contrib/llvm-project/clang/lib/CodeGen/CGExpr.cpp @@ -4895,6 +4895,16 @@ RValue CodeGenFunction::EmitSimpleCallExpr(const CallExpr *E, return EmitCall(E->getCallee()->getType(), Callee, E, ReturnValue); } +// Detect the unusual situation where an inline version is shadowed by a +// non-inline version. In that case we should pick the external one +// everywhere. That's GCC behavior too. +static bool OnlyHasInlineBuiltinDeclaration(const FunctionDecl *FD) { + for (const FunctionDecl *PD = FD; PD; PD = PD->getPreviousDecl()) + if (!PD->isInlineBuiltinDeclaration()) + return false; + return true; +} + static CGCallee EmitDirectCallee(CodeGenFunction &CGF, GlobalDecl GD) { const FunctionDecl *FD = cast<FunctionDecl>(GD.getDecl()); @@ -4902,8 +4912,8 @@ static CGCallee EmitDirectCallee(CodeGenFunction &CGF, GlobalDecl GD) { std::string FDInlineName = (FD->getName() + ".inline").str(); // When directing calling an inline builtin, call it through it's mangled // name to make it clear it's not the actual builtin. - if (FD->isInlineBuiltinDeclaration() && - CGF.CurFn->getName() != FDInlineName) { + if (CGF.CurFn->getName() != FDInlineName && + OnlyHasInlineBuiltinDeclaration(FD)) { llvm::Constant *CalleePtr = EmitFunctionDeclPointer(CGF.CGM, GD); llvm::Function *Fn = llvm::cast<llvm::Function>(CalleePtr); llvm::Module *M = Fn->getParent(); diff --git a/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/AArch64.cpp b/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/AArch64.cpp index ca0ca4bf4eea..53610f0909a2 100644 --- a/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/AArch64.cpp +++ b/contrib/llvm-project/clang/lib/Driver/ToolChains/Arch/AArch64.cpp @@ -592,4 +592,7 @@ fp16_fml_fallthrough: // Enabled A53 errata (835769) workaround by default on android Features.push_back("+fix-cortex-a53-835769"); } + + if (Args.getLastArg(options::OPT_mno_bti_at_return_twice)) + Features.push_back("+no-bti-at-return-twice"); } diff --git a/contrib/llvm-project/clang/lib/Driver/ToolChains/OpenBSD.cpp b/contrib/llvm-project/clang/lib/Driver/ToolChains/OpenBSD.cpp index bcd54bedfa89..86a10ce4b0e7 100644 --- a/contrib/llvm-project/clang/lib/Driver/ToolChains/OpenBSD.cpp +++ b/contrib/llvm-project/clang/lib/Driver/ToolChains/OpenBSD.cpp @@ -342,3 +342,12 @@ Tool *OpenBSD::buildAssembler() const { Tool *OpenBSD::buildLinker() const { return new tools::openbsd::Linker(*this); } bool OpenBSD::HasNativeLLVMSupport() const { return true; } + +bool OpenBSD::IsUnwindTablesDefault(const ArgList &Args) const { + switch (getArch()) { + case llvm::Triple::arm: + return false; + default: + return true; + } +} diff --git a/contrib/llvm-project/clang/lib/Driver/ToolChains/OpenBSD.h b/contrib/llvm-project/clang/lib/Driver/ToolChains/OpenBSD.h index 9d668711b91b..2d4c4e34520b 100644 --- a/contrib/llvm-project/clang/lib/Driver/ToolChains/OpenBSD.h +++ b/contrib/llvm-project/clang/lib/Driver/ToolChains/OpenBSD.h @@ -82,9 +82,7 @@ public: std::string getCompilerRT(const llvm::opt::ArgList &Args, StringRef Component, FileType Type = ToolChain::FT_Static) const override; - bool IsUnwindTablesDefault(const llvm::opt::ArgList &Args) const override { - return true; - } + bool IsUnwindTablesDefault(const llvm::opt::ArgList &Args) const override; LangOptions::StackProtectorMode GetDefaultStackProtectorLevel(bool KernelOrKext) const override { diff --git a/contrib/llvm-project/clang/lib/Interpreter/IncrementalExecutor.h b/contrib/llvm-project/clang/lib/Interpreter/IncrementalExecutor.h index 24447994d5f1..51b4d83d10b1 100644 --- a/contrib/llvm-project/clang/lib/Interpreter/IncrementalExecutor.h +++ b/contrib/llvm-project/clang/lib/Interpreter/IncrementalExecutor.h @@ -45,6 +45,7 @@ public: llvm::Error runCtors() const; llvm::Expected<llvm::JITTargetAddress> getSymbolAddress(llvm::StringRef Name, SymbolNameKind NameKind) const; + llvm::orc::LLJIT *getExecutionEngine() const { return Jit.get(); } }; } // end namespace clang diff --git a/contrib/llvm-project/clang/lib/Interpreter/Interpreter.cpp b/contrib/llvm-project/clang/lib/Interpreter/Interpreter.cpp index b2e7727be39a..470c9c289a74 100644 --- a/contrib/llvm-project/clang/lib/Interpreter/Interpreter.cpp +++ b/contrib/llvm-project/clang/lib/Interpreter/Interpreter.cpp @@ -196,6 +196,12 @@ const CompilerInstance *Interpreter::getCompilerInstance() const { return IncrParser->getCI(); } +const llvm::orc::LLJIT *Interpreter::getExecutionEngine() const { + if (IncrExecutor) + return IncrExecutor->getExecutionEngine(); + return nullptr; +} + llvm::Expected<PartialTranslationUnit &> Interpreter::Parse(llvm::StringRef Code) { return IncrParser->Parse(Code); diff --git a/contrib/llvm-project/clang/utils/TableGen/NeonEmitter.cpp b/contrib/llvm-project/clang/utils/TableGen/NeonEmitter.cpp index a69fbe0e42dc..1550a8a1e273 100644 --- a/contrib/llvm-project/clang/utils/TableGen/NeonEmitter.cpp +++ b/contrib/llvm-project/clang/utils/TableGen/NeonEmitter.cpp @@ -502,6 +502,7 @@ private: void emitBody(StringRef CallPrefix); void emitShadowedArgs(); void emitArgumentReversal(); + void emitReturnVarDecl(); void emitReturnReversal(); void emitReverseVariable(Variable &Dest, Variable &Src); void emitNewLine(); @@ -1228,6 +1229,15 @@ void Intrinsic::emitArgumentReversal() { } } +void Intrinsic::emitReturnVarDecl() { + assert(RetVar.getType() == Types[0]); + // Create a return variable, if we're not void. + if (!RetVar.getType().isVoid()) { + OS << " " << RetVar.getType().str() << " " << RetVar.getName() << ";"; + emitNewLine(); + } +} + void Intrinsic::emitReturnReversal() { if (isBigEndianSafe()) return; @@ -1353,13 +1363,6 @@ void Intrinsic::emitBodyAsBuiltinCall() { void Intrinsic::emitBody(StringRef CallPrefix) { std::vector<std::string> Lines; - assert(RetVar.getType() == Types[0]); - // Create a return variable, if we're not void. - if (!RetVar.getType().isVoid()) { - OS << " " << RetVar.getType().str() << " " << RetVar.getName() << ";"; - emitNewLine(); - } - if (!Body || Body->getValues().empty()) { // Nothing specific to output - must output a builtin. emitBodyAsBuiltinCall(); @@ -1849,6 +1852,9 @@ void Intrinsic::generateImpl(bool ReverseArguments, OS << " __attribute__((unavailable));"; } else { emitOpeningBrace(); + // Emit return variable declaration first as to not trigger + // -Wdeclaration-after-statement. + emitReturnVarDecl(); emitShadowedArgs(); if (ReverseArguments) emitArgumentReversal(); @@ -1867,6 +1873,9 @@ void Intrinsic::indexBody() { CurrentRecord = R; initVariables(); + // Emit return variable declaration first as to not trigger + // -Wdeclaration-after-statement. + emitReturnVarDecl(); emitBody(""); OS.str(""); diff --git a/contrib/llvm-project/compiler-rt/lib/asan/asan_linux.cpp b/contrib/llvm-project/compiler-rt/lib/asan/asan_linux.cpp index 1d92c530bd11..defd81bc19e2 100644 --- a/contrib/llvm-project/compiler-rt/lib/asan/asan_linux.cpp +++ b/contrib/llvm-project/compiler-rt/lib/asan/asan_linux.cpp @@ -131,30 +131,24 @@ static int FindFirstDSOCallback(struct dl_phdr_info *info, size_t size, VReport(2, "info->dlpi_name = %s\tinfo->dlpi_addr = %p\n", info->dlpi_name, (void *)info->dlpi_addr); - // Continue until the first dynamic library is found - if (!info->dlpi_name || info->dlpi_name[0] == 0) - return 0; - - // Ignore vDSO - if (internal_strncmp(info->dlpi_name, "linux-", sizeof("linux-") - 1) == 0) - return 0; + const char **name = (const char **)data; -#if SANITIZER_FREEBSD || SANITIZER_NETBSD // Ignore first entry (the main program) - char **p = (char **)data; - if (!(*p)) { - *p = (char *)-1; + if (!*name) { + *name = ""; return 0; } -#endif -#if SANITIZER_SOLARIS - // Ignore executable on Solaris - if (info->dlpi_addr == 0) +# if SANITIZER_LINUX + // Ignore vDSO. glibc versions earlier than 2.15 (and some patched + // by distributors) return an empty name for the vDSO entry, so + // detect this as well. + if (!info->dlpi_name[0] || + internal_strncmp(info->dlpi_name, "linux-", sizeof("linux-") - 1) == 0) return 0; -#endif +# endif - *(const char **)data = info->dlpi_name; + *name = info->dlpi_name; return 1; } @@ -175,7 +169,7 @@ void AsanCheckDynamicRTPrereqs() { // Ensure that dynamic RT is the first DSO in the list const char *first_dso_name = nullptr; dl_iterate_phdr(FindFirstDSOCallback, &first_dso_name); - if (first_dso_name && !IsDynamicRTName(first_dso_name)) { + if (first_dso_name && first_dso_name[0] && !IsDynamicRTName(first_dso_name)) { Report("ASan runtime does not come first in initial library list; " "you should either link runtime to your application or " "manually preload it with LD_PRELOAD.\n"); diff --git a/contrib/llvm-project/compiler-rt/lib/scudo/scudo_allocator.cpp b/contrib/llvm-project/compiler-rt/lib/scudo/scudo_allocator.cpp index 5b6ac8b35493..6a6b577ab002 100644 --- a/contrib/llvm-project/compiler-rt/lib/scudo/scudo_allocator.cpp +++ b/contrib/llvm-project/compiler-rt/lib/scudo/scudo_allocator.cpp @@ -49,7 +49,7 @@ inline u32 computeCRC32(u32 Crc, uptr Value, uptr *Array, uptr ArraySize) { // as opposed to only for scudo_crc32.cpp. This means that other hardware // specific instructions were likely emitted at other places, and as a // result there is no reason to not use it here. -#if defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) +#if defined(__CRC32__) || defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) Crc = CRC32_INTRINSIC(Crc, Value); for (uptr i = 0; i < ArraySize; i++) Crc = CRC32_INTRINSIC(Crc, Array[i]); @@ -65,7 +65,7 @@ inline u32 computeCRC32(u32 Crc, uptr Value, uptr *Array, uptr ArraySize) { for (uptr i = 0; i < ArraySize; i++) Crc = computeSoftwareCRC32(Crc, Array[i]); return Crc; -#endif // defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) +#endif // defined(__CRC32__) || defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) } static BackendT &getBackend(); diff --git a/contrib/llvm-project/compiler-rt/lib/scudo/scudo_crc32.cpp b/contrib/llvm-project/compiler-rt/lib/scudo/scudo_crc32.cpp index 87473505fe79..137c44c5c1cd 100644 --- a/contrib/llvm-project/compiler-rt/lib/scudo/scudo_crc32.cpp +++ b/contrib/llvm-project/compiler-rt/lib/scudo/scudo_crc32.cpp @@ -15,10 +15,10 @@ namespace __scudo { -#if defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) +#if defined(__CRC32__) || defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) u32 computeHardwareCRC32(u32 Crc, uptr Data) { return CRC32_INTRINSIC(Crc, Data); } -#endif // defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) +#endif // defined(__CRC32__) || defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) } // namespace __scudo diff --git a/contrib/llvm-project/compiler-rt/lib/scudo/scudo_crc32.h b/contrib/llvm-project/compiler-rt/lib/scudo/scudo_crc32.h index ef40595a56d1..4314d30e929f 100644 --- a/contrib/llvm-project/compiler-rt/lib/scudo/scudo_crc32.h +++ b/contrib/llvm-project/compiler-rt/lib/scudo/scudo_crc32.h @@ -16,13 +16,17 @@ #include "sanitizer_common/sanitizer_internal_defs.h" // Hardware CRC32 is supported at compilation via the following: -// - for i386 & x86_64: -msse4.2 +// - for i386 & x86_64: -mcrc32 (earlier: -msse4.2) // - for ARM & AArch64: -march=armv8-a+crc or -mcrc // An additional check must be performed at runtime as well to make sure the // emitted instructions are valid on the target host. -#if defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) -# ifdef __SSE4_2__ +#if defined(__CRC32__) || defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) +# if defined(__CRC32__) +// NB: clang has <crc32intrin.h> but GCC does not +# include <smmintrin.h> +# define CRC32_INTRINSIC FIRST_32_SECOND_64(__builtin_ia32_crc32si, __builtin_ia32_crc32di) +# elif defined(__SSE4_2__) # include <smmintrin.h> # define CRC32_INTRINSIC FIRST_32_SECOND_64(_mm_crc32_u32, _mm_crc32_u64) # endif @@ -30,7 +34,7 @@ # include <arm_acle.h> # define CRC32_INTRINSIC FIRST_32_SECOND_64(__crc32cw, __crc32cd) # endif -#endif // defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) +#endif // defined(__CRC32__) || defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) namespace __scudo { diff --git a/contrib/llvm-project/compiler-rt/lib/scudo/standalone/checksum.h b/contrib/llvm-project/compiler-rt/lib/scudo/standalone/checksum.h index a63b1b4f064d..0f787ce2b5cd 100644 --- a/contrib/llvm-project/compiler-rt/lib/scudo/standalone/checksum.h +++ b/contrib/llvm-project/compiler-rt/lib/scudo/standalone/checksum.h @@ -12,12 +12,16 @@ #include "internal_defs.h" // Hardware CRC32 is supported at compilation via the following: -// - for i386 & x86_64: -msse4.2 +// - for i386 & x86_64: -mcrc32 (earlier: -msse4.2) // - for ARM & AArch64: -march=armv8-a+crc or -mcrc // An additional check must be performed at runtime as well to make sure the // emitted instructions are valid on the target host. -#ifdef __SSE4_2__ +#if defined(__CRC32__) +// NB: clang has <crc32intrin.h> but GCC does not +#include <smmintrin.h> +#define CRC32_INTRINSIC FIRST_32_SECOND_64(__builtin_ia32_crc32si, __builtin_ia32_crc32di) +#elif defined(__SSE4_2__) #include <smmintrin.h> #define CRC32_INTRINSIC FIRST_32_SECOND_64(_mm_crc32_u32, _mm_crc32_u64) #endif diff --git a/contrib/llvm-project/compiler-rt/lib/scudo/standalone/chunk.h b/contrib/llvm-project/compiler-rt/lib/scudo/standalone/chunk.h index 69b8e1b12a91..0581420dfc99 100644 --- a/contrib/llvm-project/compiler-rt/lib/scudo/standalone/chunk.h +++ b/contrib/llvm-project/compiler-rt/lib/scudo/standalone/chunk.h @@ -25,7 +25,7 @@ inline u16 computeChecksum(u32 Seed, uptr Value, uptr *Array, uptr ArraySize) { // as opposed to only for crc32_hw.cpp. This means that other hardware // specific instructions were likely emitted at other places, and as a result // there is no reason to not use it here. -#if defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) +#if defined(__CRC32__) || defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) u32 Crc = static_cast<u32>(CRC32_INTRINSIC(Seed, Value)); for (uptr I = 0; I < ArraySize; I++) Crc = static_cast<u32>(CRC32_INTRINSIC(Crc, Array[I])); @@ -42,7 +42,7 @@ inline u16 computeChecksum(u32 Seed, uptr Value, uptr *Array, uptr ArraySize) { Checksum = computeBSDChecksum(Checksum, Array[I]); return Checksum; } -#endif // defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) +#endif // defined(__CRC32__) || defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) } namespace Chunk { diff --git a/contrib/llvm-project/compiler-rt/lib/scudo/standalone/crc32_hw.cpp b/contrib/llvm-project/compiler-rt/lib/scudo/standalone/crc32_hw.cpp index 62841ba51019..d13c615498ff 100644 --- a/contrib/llvm-project/compiler-rt/lib/scudo/standalone/crc32_hw.cpp +++ b/contrib/llvm-project/compiler-rt/lib/scudo/standalone/crc32_hw.cpp @@ -10,10 +10,10 @@ namespace scudo { -#if defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) +#if defined(__CRC32__) || defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) u32 computeHardwareCRC32(u32 Crc, uptr Data) { return static_cast<u32>(CRC32_INTRINSIC(Crc, Data)); } -#endif // defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) +#endif // defined(__CRC32__) || defined(__SSE4_2__) || defined(__ARM_FEATURE_CRC32) } // namespace scudo diff --git a/contrib/llvm-project/libcxx/src/random.cpp b/contrib/llvm-project/libcxx/src/random.cpp index 6472a8dbcba3..146b7c56bdeb 100644 --- a/contrib/llvm-project/libcxx/src/random.cpp +++ b/contrib/llvm-project/libcxx/src/random.cpp @@ -210,7 +210,7 @@ random_device::entropy() const noexcept return std::numeric_limits<result_type>::digits; return ent; -#elif defined(__OpenBSD__) || defined(_LIBCPP_USING_FUCHSIA_CPRNG) +#elif defined(_LIBCPP_USING_ARC4_RANDOM) || defined(_LIBCPP_USING_FUCHSIA_CPRNG) return std::numeric_limits<result_type>::digits; #else return 0; diff --git a/contrib/llvm-project/lld/COFF/DebugTypes.cpp b/contrib/llvm-project/lld/COFF/DebugTypes.cpp index 67b708c5b36a..0d25de464f9f 100644 --- a/contrib/llvm-project/lld/COFF/DebugTypes.cpp +++ b/contrib/llvm-project/lld/COFF/DebugTypes.cpp @@ -56,8 +56,12 @@ public: return; Guid = expectedInfo->getGuid(); auto it = ctx.typeServerSourceMappings.emplace(Guid, this); - assert(it.second); - (void)it; + if (!it.second) { + // If we hit here we have collision on Guid's in two PDB files. + // This can happen if the PDB Guid is invalid or if we are really + // unlucky. This should fall back on stright file-system lookup. + it.first->second = nullptr; + } } Error mergeDebugT(TypeMerger *m) override; @@ -398,11 +402,12 @@ Expected<TypeServerSource *> UseTypeServerSource::getTypeServerSource() { const codeview::GUID &tsId = typeServerDependency.getGuid(); StringRef tsPath = typeServerDependency.getName(); - TypeServerSource *tsSrc; + TypeServerSource *tsSrc = nullptr; auto it = ctx.typeServerSourceMappings.find(tsId); if (it != ctx.typeServerSourceMappings.end()) { tsSrc = (TypeServerSource *)it->second; - } else { + } + if (tsSrc == nullptr) { // The file failed to load, lookup by name PDBInputFile *pdb = PDBInputFile::findFromRecordPath(ctx, tsPath, file); if (!pdb) @@ -897,7 +902,11 @@ struct GHashTable { /// A ghash table cell for deduplicating types from TpiSources. class GHashCell { - uint64_t data = 0; + // Force "data" to be 64-bit aligned; otherwise, some versions of clang + // will generate calls to libatomic when using some versions of libstdc++ + // on 32-bit targets. (Also, in theory, there could be a target where + // new[] doesn't always return an 8-byte-aligned allocation.) + alignas(sizeof(uint64_t)) uint64_t data = 0; public: GHashCell() = default; diff --git a/contrib/llvm-project/lld/ELF/SyntheticSections.h b/contrib/llvm-project/lld/ELF/SyntheticSections.h index e609b3d7982a..3161785988f6 100644 --- a/contrib/llvm-project/lld/ELF/SyntheticSections.h +++ b/contrib/llvm-project/lld/ELF/SyntheticSections.h @@ -187,9 +187,7 @@ private: class BssSection final : public SyntheticSection { public: BssSection(StringRef name, uint64_t size, uint32_t alignment); - void writeTo(uint8_t *) override { - llvm_unreachable("unexpected writeTo() call for SHT_NOBITS section"); - } + void writeTo(uint8_t *) override {} bool isNeeded() const override { return size != 0; } size_t getSize() const override { return size; } diff --git a/contrib/llvm-project/lld/ELF/Writer.cpp b/contrib/llvm-project/lld/ELF/Writer.cpp index 9383ac46c8e7..5794f048c990 100644 --- a/contrib/llvm-project/lld/ELF/Writer.cpp +++ b/contrib/llvm-project/lld/ELF/Writer.cpp @@ -722,23 +722,30 @@ template <class ELFT> void Writer<ELFT>::addSectionSymbols() { auto *sec = dyn_cast<OutputSection>(cmd); if (!sec) continue; - auto i = llvm::find_if(sec->commands, [](SectionCommand *cmd) { - if (auto *isd = dyn_cast<InputSectionDescription>(cmd)) - return !isd->sections.empty(); - return false; - }); - if (i == sec->commands.end()) - continue; - InputSectionBase *isec = cast<InputSectionDescription>(*i)->sections[0]; - - // Relocations are not using REL[A] section symbols. - if (isec->type == SHT_REL || isec->type == SHT_RELA) - continue; - - // Unlike other synthetic sections, mergeable output sections contain data - // copied from input sections, and there may be a relocation pointing to its - // contents if -r or --emit-reloc is given. - if (isa<SyntheticSection>(isec) && !(isec->flags & SHF_MERGE)) + OutputSection &osec = *sec; + InputSectionBase *isec = nullptr; + // Iterate over all input sections and add a STT_SECTION symbol if any input + // section may be a relocation target. + for (SectionCommand *cmd : osec.commands) { + auto *isd = dyn_cast<InputSectionDescription>(cmd); + if (!isd) + continue; + for (InputSectionBase *s : isd->sections) { + // Relocations are not using REL[A] section symbols. + if (s->type == SHT_REL || s->type == SHT_RELA) + continue; + + // Unlike other synthetic sections, mergeable output sections contain + // data copied from input sections, and there may be a relocation + // pointing to its contents if -r or --emit-reloc is given. + if (isa<SyntheticSection>(s) && !(s->flags & SHF_MERGE)) + continue; + + isec = s; + break; + } + } + if (!isec) continue; // Set the symbol to be relative to the output section so that its st_value diff --git a/contrib/llvm-project/llvm/include/llvm/CodeGen/FastISel.h b/contrib/llvm-project/llvm/include/llvm/CodeGen/FastISel.h index 775698a66ada..6de8ac4273f7 100644 --- a/contrib/llvm-project/llvm/include/llvm/CodeGen/FastISel.h +++ b/contrib/llvm-project/llvm/include/llvm/CodeGen/FastISel.h @@ -212,6 +212,7 @@ protected: const TargetRegisterInfo &TRI; const TargetLibraryInfo *LibInfo; bool SkipTargetIndependentISel; + bool UseInstrRefDebugInfo = false; /// The position of the last instruction for materializing constants /// for use in the current block. It resets to EmitStartPt when it makes sense @@ -318,6 +319,12 @@ public: /// Reset InsertPt to the given old insert position. void leaveLocalValueArea(SavePoint Old); + /// Signal whether instruction referencing variable locations are desired for + /// this function's debug-info. + void useInstrRefDebugInfo(bool Flag) { + UseInstrRefDebugInfo = Flag; + } + protected: explicit FastISel(FunctionLoweringInfo &FuncInfo, const TargetLibraryInfo *LibInfo, diff --git a/contrib/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h b/contrib/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h index e31719bcff0b..4f348c9feaa5 100644 --- a/contrib/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h +++ b/contrib/llvm-project/llvm/include/llvm/CodeGen/SelectionDAG.h @@ -278,6 +278,9 @@ class SelectionDAG { uint16_t NextPersistentId = 0; + /// Are instruction referencing variable locations desired for this function? + bool UseInstrRefDebugInfo = false; + public: /// Clients of various APIs that cause global effects on /// the DAG can optionally implement this interface. This allows the clients @@ -1702,6 +1705,16 @@ public: /// function mirrors \c llvm::salvageDebugInfo. void salvageDebugInfo(SDNode &N); + /// Signal whether instruction referencing variable locations are desired for + /// this function's debug-info. + void useInstrRefDebugInfo(bool Flag) { + UseInstrRefDebugInfo = Flag; + } + + bool getUseInstrRefDebugInfo() const { + return UseInstrRefDebugInfo; + } + void dump() const; /// In most cases this function returns the ABI alignment for a given type, diff --git a/contrib/llvm-project/llvm/include/llvm/CodeGen/SelectionDAGISel.h b/contrib/llvm-project/llvm/include/llvm/CodeGen/SelectionDAGISel.h index 9cea197724cc..fc3fdf3e4583 100644 --- a/contrib/llvm-project/llvm/include/llvm/CodeGen/SelectionDAGISel.h +++ b/contrib/llvm-project/llvm/include/llvm/CodeGen/SelectionDAGISel.h @@ -53,6 +53,7 @@ public: const TargetLowering *TLI; bool FastISelFailed; SmallPtrSet<const Instruction *, 4> ElidedArgCopyInstrs; + bool UseInstrRefDebugInfo = false; /// Current optimization remark emitter. /// Used to report things like combines and FastISel failures. diff --git a/contrib/llvm-project/llvm/lib/CodeGen/MachineFunction.cpp b/contrib/llvm-project/llvm/lib/CodeGen/MachineFunction.cpp index fd5ea5cad072..02f58ca5eef0 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/MachineFunction.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/MachineFunction.cpp @@ -1181,9 +1181,6 @@ void MachineFunction::finalizeDebugInstrRefs() { MI.getOperand(1).ChangeToRegister(0, false); }; - if (!useDebugInstrRef()) - return; - for (auto &MBB : *this) { for (auto &MI : MBB) { if (!MI.isDebugRef() || !MI.getOperand(0).isReg()) diff --git a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp index d8ef79fe9a7b..87a1ebe4c1db 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -1265,7 +1265,7 @@ bool FastISel::selectIntrinsicCall(const IntrinsicInst *II) { // If using instruction referencing, mutate this into a DBG_INSTR_REF, // to be later patched up by finalizeDebugInstrRefs. Tack a deref onto // the expression, we don't have an "indirect" flag in DBG_INSTR_REF. - if (FuncInfo.MF->useDebugInstrRef() && Op->isReg()) { + if (UseInstrRefDebugInfo && Op->isReg()) { Builder->setDesc(TII.get(TargetOpcode::DBG_INSTR_REF)); Builder->getOperand(1).ChangeToImmediate(0); auto *NewExpr = @@ -1324,7 +1324,7 @@ bool FastISel::selectIntrinsicCall(const IntrinsicInst *II) { // If using instruction referencing, mutate this into a DBG_INSTR_REF, // to be later patched up by finalizeDebugInstrRefs. - if (FuncInfo.MF->useDebugInstrRef()) { + if (UseInstrRefDebugInfo) { Builder->setDesc(TII.get(TargetOpcode::DBG_INSTR_REF)); Builder->getOperand(1).ChangeToImmediate(0); } diff --git a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp index 331e0325aea3..e3e05c868102 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp @@ -1341,11 +1341,12 @@ EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned, /// InstrEmitter - Construct an InstrEmitter and set it to start inserting /// at the given position in the given block. InstrEmitter::InstrEmitter(const TargetMachine &TM, MachineBasicBlock *mbb, - MachineBasicBlock::iterator insertpos) + MachineBasicBlock::iterator insertpos, + bool UseInstrRefDebugInfo) : MF(mbb->getParent()), MRI(&MF->getRegInfo()), TII(MF->getSubtarget().getInstrInfo()), TRI(MF->getSubtarget().getRegisterInfo()), TLI(MF->getSubtarget().getTargetLowering()), MBB(mbb), InsertPos(insertpos) { - EmitDebugInstrRefs = MF->useDebugInstrRef(); + EmitDebugInstrRefs = UseInstrRefDebugInfo; } diff --git a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h index ac8a70156522..ced8f064b9be 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h +++ b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h @@ -154,7 +154,8 @@ public: /// InstrEmitter - Construct an InstrEmitter and set it to start inserting /// at the given position in the given block. InstrEmitter(const TargetMachine &TM, MachineBasicBlock *mbb, - MachineBasicBlock::iterator insertpos); + MachineBasicBlock::iterator insertpos, + bool UseInstrRefDebugInfo); private: void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned, diff --git a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp index 1b89864116cb..1a6be0cc2091 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp @@ -758,7 +758,8 @@ void ScheduleDAGLinearize::Schedule() { MachineBasicBlock* ScheduleDAGLinearize::EmitSchedule(MachineBasicBlock::iterator &InsertPos) { - InstrEmitter Emitter(DAG->getTarget(), BB, InsertPos); + InstrEmitter Emitter(DAG->getTarget(), BB, InsertPos, + DAG->getUseInstrRefDebugInfo()); DenseMap<SDValue, Register> VRBaseMap; LLVM_DEBUG({ dbgs() << "\n*** Final schedule ***\n"; }); diff --git a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp index 55f6f288f3e3..92897aca7f6b 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp @@ -843,7 +843,8 @@ EmitPhysRegCopy(SUnit *SU, DenseMap<SUnit*, Register> &VRBaseMap, /// not necessarily refer to returned BB. The emitter may split blocks. MachineBasicBlock *ScheduleDAGSDNodes:: EmitSchedule(MachineBasicBlock::iterator &InsertPos) { - InstrEmitter Emitter(DAG->getTarget(), BB, InsertPos); + InstrEmitter Emitter(DAG->getTarget(), BB, InsertPos, + DAG->getUseInstrRefDebugInfo()); DenseMap<SDValue, Register> VRBaseMap; DenseMap<SUnit*, Register> CopyVRBaseMap; SmallVector<std::pair<unsigned, MachineInstr*>, 32> Orders; diff --git a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index d5998d166d25..40d861702e86 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -5494,8 +5494,18 @@ SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL, // Build vector (integer) scalar operands may need implicit // truncation - do this before constant folding. - if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT)) + if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT)) { + // Don't create illegally-typed nodes unless they're constants or undef + // - if we fail to constant fold we can't guarantee the (dead) nodes + // we're creating will be cleaned up before being visited for + // legalization. + if (NewNodesMustHaveLegalTypes && !ScalarOp.isUndef() && + !isa<ConstantSDNode>(ScalarOp) && + TLI->getTypeAction(*getContext(), InSVT) != + TargetLowering::TypeLegal) + return SDValue(); ScalarOp = getNode(ISD::TRUNCATE, DL, InSVT, ScalarOp); + } ScalarOps.push_back(ScalarOp); } diff --git a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 01230a36e744..c61716ba1676 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -926,7 +926,10 @@ void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG, CallConv.getValue(), RegVTs[Value]) : RegVTs[Value]; - if (ExtendKind == ISD::ANY_EXTEND && TLI.isZExtFree(Val, RegisterVT)) + // We need to zero extend constants that are liveout to match assumptions + // in FunctionLoweringInfo::ComputePHILiveOutRegInfo. + if (ExtendKind == ISD::ANY_EXTEND && + (TLI.isZExtFree(Val, RegisterVT) || isa<ConstantSDNode>(Val))) ExtendKind = ISD::ZERO_EXTEND; getCopyToParts(DAG, dl, Val.getValue(Val.getResNo() + Value), &Parts[Part], diff --git a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 3c786904620a..b83a60129c78 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -425,6 +425,11 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) { const Function &Fn = mf.getFunction(); MF = &mf; + // Decide what flavour of variable location debug-info will be used, before + // we change the optimisation level. + UseInstrRefDebugInfo = mf.useDebugInstrRef(); + CurDAG->useInstrRefDebugInfo(UseInstrRefDebugInfo); + // Reset the target options before resetting the optimization // level below. // FIXME: This is a horrible hack and should be processed via @@ -654,7 +659,8 @@ bool SelectionDAGISel::runOnMachineFunction(MachineFunction &mf) { // For debug-info, in instruction referencing mode, we need to perform some // post-isel maintenence. - MF->finalizeDebugInstrRefs(); + if (UseInstrRefDebugInfo) + MF->finalizeDebugInstrRefs(); // Determine if there are any calls in this machine function. MachineFrameInfo &MFI = MF->getFrameInfo(); @@ -1380,6 +1386,8 @@ void SelectionDAGISel::SelectAllBasicBlocks(const Function &Fn) { if (TM.Options.EnableFastISel) { LLVM_DEBUG(dbgs() << "Enabling fast-isel\n"); FastIS = TLI->createFastISel(*FuncInfo, LibInfo); + if (FastIS) + FastIS->useInstrRefDebugInfo(UseInstrRefDebugInfo); } ReversePostOrderTraversal<const Function*> RPOT(&Fn); diff --git a/contrib/llvm-project/llvm/lib/MC/ELFObjectWriter.cpp b/contrib/llvm-project/llvm/lib/MC/ELFObjectWriter.cpp index 883735fcc293..6fd2f7e7a718 100644 --- a/contrib/llvm-project/llvm/lib/MC/ELFObjectWriter.cpp +++ b/contrib/llvm-project/llvm/lib/MC/ELFObjectWriter.cpp @@ -1336,6 +1336,7 @@ bool ELFObjectWriter::shouldRelocateWithSymbol(const MCAssembler &Asm, // can update it. return true; case ELF::STB_GLOBAL: + case ELF::STB_GNU_UNIQUE: // Global ELF symbols can be preempted by the dynamic linker. The relocation // has to point to the symbol for a reason analogous to the STB_WEAK case. return true; diff --git a/contrib/llvm-project/llvm/lib/Object/ELF.cpp b/contrib/llvm-project/llvm/lib/Object/ELF.cpp index 6e56da1a31f3..56a426211755 100644 --- a/contrib/llvm-project/llvm/lib/Object/ELF.cpp +++ b/contrib/llvm-project/llvm/lib/Object/ELF.cpp @@ -561,11 +561,9 @@ Expected<typename ELFT::DynRange> ELFFile<ELFT>::dynamicEntries() const { } if (Dyn.empty()) - // TODO: this error is untested. return createError("invalid empty dynamic section"); if (Dyn.back().d_tag != ELF::DT_NULL) - // TODO: this error is untested. return createError("dynamic sections must be DT_NULL terminated"); return Dyn; diff --git a/contrib/llvm-project/llvm/lib/Support/AArch64TargetParser.cpp b/contrib/llvm-project/llvm/lib/Support/AArch64TargetParser.cpp index cdf7c8ade9aa..bb19e2714be1 100644 --- a/contrib/llvm-project/llvm/lib/Support/AArch64TargetParser.cpp +++ b/contrib/llvm-project/llvm/lib/Support/AArch64TargetParser.cpp @@ -120,6 +120,8 @@ bool AArch64::getExtensionFeatures(uint64_t Extensions, Features.push_back("+mops"); if (Extensions & AArch64::AEK_PERFMON) Features.push_back("+perfmon"); + if (Extensions & AArch64::AEK_SSBS) + Features.push_back("+ssbs"); return true; } diff --git a/contrib/llvm-project/llvm/lib/Target/AArch64/AArch64.td b/contrib/llvm-project/llvm/lib/Target/AArch64/AArch64.td index 9a04b28a8b8f..70c7b7b3f5dc 100644 --- a/contrib/llvm-project/llvm/lib/Target/AArch64/AArch64.td +++ b/contrib/llvm-project/llvm/lib/Target/AArch64/AArch64.td @@ -464,6 +464,11 @@ def FeatureEL3 : SubtargetFeature<"el3", "HasEL3", "true", def FeatureFixCortexA53_835769 : SubtargetFeature<"fix-cortex-a53-835769", "FixCortexA53_835769", "true", "Mitigate Cortex-A53 Erratum 835769">; +def FeatureNoBTIAtReturnTwice : SubtargetFeature<"no-bti-at-return-twice", + "NoBTIAtReturnTwice", "true", + "Don't place a BTI instruction " + "after a return-twice">; + //===----------------------------------------------------------------------===// // Architectures. // @@ -953,7 +958,7 @@ def ProcessorFeatures { FeatureRCPC, FeatureSSBS]; list<SubtargetFeature> A77 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureFullFP16, FeatureDotProd, - FeatureRCPC]; + FeatureRCPC, FeatureSSBS]; list<SubtargetFeature> A78 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureFullFP16, FeatureDotProd, FeatureRCPC, FeaturePerfMon, FeatureSPE, @@ -971,11 +976,12 @@ def ProcessorFeatures { FeatureSB, FeatureSpecRestrict]; list<SubtargetFeature> X1 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureRCPC, FeaturePerfMon, - FeatureSPE, FeatureFullFP16, FeatureDotProd]; + FeatureSPE, FeatureFullFP16, FeatureDotProd, + FeatureSSBS]; list<SubtargetFeature> X1C = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureRCPC, FeaturePerfMon, FeatureSPE, FeatureFullFP16, FeatureDotProd, - FeaturePAuth]; + FeaturePAuth, FeatureSSBS]; list<SubtargetFeature> X2 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon, FeatureMatMulInt8, FeatureBF16, FeatureAM, FeatureMTE, FeatureETE, FeatureSVE2BitPerm, diff --git a/contrib/llvm-project/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp b/contrib/llvm-project/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp index ac243347b24d..b31b709c0c0a 100644 --- a/contrib/llvm-project/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp +++ b/contrib/llvm-project/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp @@ -559,7 +559,7 @@ bool AArch64CollectLOH::runOnMachineFunction(MachineFunction &MF) { // Walk the basic block backwards and update the per register state machine // in the process. for (const MachineInstr &MI : - instructionsWithoutDebug(MBB.rbegin(), MBB.rend())) { *** 2231 LINES SKIPPED ***
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