From owner-svn-src-all@FreeBSD.ORG Mon Feb 25 22:45:04 2013 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.FreeBSD.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 4C9FA93C; Mon, 25 Feb 2013 22:45:04 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id 3035ED30; Mon, 25 Feb 2013 22:45:04 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.5/8.14.5) with ESMTP id r1PMj4QR052388; Mon, 25 Feb 2013 22:45:04 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.5/8.14.5/Submit) id r1PMj3Bn052384; Mon, 25 Feb 2013 22:45:03 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201302252245.r1PMj3Bn052384@svn.freebsd.org> From: Adrian Chadd Date: Mon, 25 Feb 2013 22:45:03 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r247287 - in head/sys/dev/ath: . ath_hal/ar5416 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 25 Feb 2013 22:45:04 -0000 Author: adrian Date: Mon Feb 25 22:45:02 2013 New Revision: 247287 URL: http://svnweb.freebsd.org/changeset/base/247287 Log: Part #2 of the TX chainmask changes: * Remove ar5416UpdateChainmasks(); * Remove the TX chainmask override code from the ar5416 TX descriptor setup routines; * Write a driver method to calculate the current chainmask based on the operating mode and update the driver state; * Call the HAL chainmask method before calling ath_hal_reset(); * Use the currently configured chainmask in the TX descriptors rather than the hardware TX chainmasks. Tested: * AR5416, STA/AP mode - legacy and 11n modes Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c head/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c head/sys/dev/ath/if_ath.c head/sys/dev/ath/if_ath_tx_ht.c Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Mon Feb 25 22:42:43 2013 (r247286) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Mon Feb 25 22:45:02 2013 (r247287) @@ -44,7 +44,6 @@ static void ar5416InitBB(struct ath_hal static void ar5416InitIMR(struct ath_hal *ah, HAL_OPMODE opmode); static void ar5416InitQoS(struct ath_hal *ah); static void ar5416InitUserSettings(struct ath_hal *ah); -static void ar5416UpdateChainMasks(struct ath_hal *ah, HAL_BOOL is_ht); static void ar5416OverrideIni(struct ath_hal *ah, const struct ieee80211_channel *); #if 0 @@ -210,11 +209,6 @@ ar5416Reset(struct ath_hal *ah, HAL_OPMO __func__, OS_REG_READ(ah,AR_PHY_ADC_CTL)); /* - * Setup ah_tx_chainmask / ah_rx_chainmask before we fiddle - * with enabling the TX/RX radio chains. - */ - ar5416UpdateChainMasks(ah, IEEE80211_IS_CHAN_HT(chan)); - /* * This routine swaps the analog chains - it should be done * before any radio register twiddling is done. */ @@ -1464,31 +1458,6 @@ ar5416RestoreChainMask(struct ath_hal *a } } -/* - * Update the chainmask based on the current channel configuration. - * - * XXX ath9k checks bluetooth co-existence here - * XXX ath9k checks whether the current state is "off-channel". - * XXX ath9k sticks the hardware into 1x1 mode for legacy; - * we're going to leave multi-RX on for multi-path cancellation. - */ -static void -ar5416UpdateChainMasks(struct ath_hal *ah, HAL_BOOL is_ht) -{ - struct ath_hal_private *ahpriv = AH_PRIVATE(ah); - HAL_CAPABILITIES *pCap = &ahpriv->ah_caps; - - if (is_ht) { - AH5416(ah)->ah_tx_chainmask = pCap->halTxChainMask; - } else { - AH5416(ah)->ah_tx_chainmask = 1; - } - AH5416(ah)->ah_rx_chainmask = pCap->halRxChainMask; - HALDEBUG(ah, HAL_DEBUG_RESET, "TX chainmask: 0x%x; RX chainmask: 0x%x\n", - AH5416(ah)->ah_tx_chainmask, - AH5416(ah)->ah_rx_chainmask); -} - void ar5416InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan) { Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c Mon Feb 25 22:42:43 2013 (r247286) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c Mon Feb 25 22:45:02 2013 (r247287) @@ -701,20 +701,6 @@ ar5416Set11nRateScenario(struct ath_hal (void)nseries; /* - * XXX since the upper layers doesn't know the current chainmask - * XXX setup, just override its decisions here. - * XXX The upper layers need to be taught this! - */ - if (series[0].Tries != 0) - series[0].ChSel = AH5416(ah)->ah_tx_chainmask; - if (series[1].Tries != 0) - series[1].ChSel = AH5416(ah)->ah_tx_chainmask; - if (series[2].Tries != 0) - series[2].ChSel = AH5416(ah)->ah_tx_chainmask; - if (series[3].Tries != 0) - series[3].ChSel = AH5416(ah)->ah_tx_chainmask; - - /* * Only one of RTS and CTS enable must be set. * If a frame has both set, just do RTS protection - * that's enough to satisfy legacy protection. Modified: head/sys/dev/ath/if_ath.c ============================================================================== --- head/sys/dev/ath/if_ath.c Mon Feb 25 22:42:43 2013 (r247286) +++ head/sys/dev/ath/if_ath.c Mon Feb 25 22:45:02 2013 (r247287) @@ -1476,6 +1476,26 @@ ath_reset_keycache(struct ath_softc *sc) ieee80211_crypto_reload_keys(ic); } +/* + * Fetch the current chainmask configuration based on the current + * operating channel and options. + */ +static void +ath_update_chainmasks(struct ath_softc *sc, struct ieee80211_channel *chan) +{ + + /* + * Set TX chainmask to the currently configured chainmask; + * the TX chainmask depends upon the current operating mode. + */ + sc->sc_cur_rxchainmask = sc->sc_rxchainmask; + if (IEEE80211_IS_CHAN_HT(chan)) { + sc->sc_cur_txchainmask = sc->sc_txchainmask; + } else { + sc->sc_cur_txchainmask = 1; + } +} + void ath_resume(struct ath_softc *sc) { @@ -1494,6 +1514,10 @@ ath_resume(struct ath_softc *sc) * Must reset the chip before we reload the * keycache as we were powered down on suspend. */ + ath_update_chainmasks(sc, + sc->sc_curchan != NULL ? sc->sc_curchan : ic->ic_curchan); + ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask, + sc->sc_cur_rxchainmask); ath_hal_reset(ah, sc->sc_opmode, sc->sc_curchan != NULL ? sc->sc_curchan : ic->ic_curchan, AH_FALSE, &status); @@ -1935,6 +1959,9 @@ ath_init(void *arg) * and then setup of the interrupt mask. */ ath_settkipmic(sc); + ath_update_chainmasks(sc, ic->ic_curchan); + ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask, + sc->sc_cur_rxchainmask); if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_FALSE, &status)) { if_printf(ifp, "unable to reset hardware; hal status %u\n", status); @@ -2250,6 +2277,9 @@ ath_reset(struct ifnet *ifp, ATH_RESET_T ath_settkipmic(sc); /* configure TKIP MIC handling */ /* NB: indicate channel change so we do a full reset */ + ath_update_chainmasks(sc, ic->ic_curchan); + ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask, + sc->sc_cur_rxchainmask); if (!ath_hal_reset(ah, sc->sc_opmode, ic->ic_curchan, AH_TRUE, &status)) if_printf(ifp, "%s: unable to reset hardware; hal status %u\n", __func__, status); @@ -4440,6 +4470,9 @@ ath_chan_set(struct ath_softc *sc, struc */ ath_draintxq(sc, ATH_RESET_FULL); /* clear pending tx frames */ + ath_update_chainmasks(sc, chan); + ath_hal_setchainmasks(sc->sc_ah, sc->sc_cur_txchainmask, + sc->sc_cur_rxchainmask); if (!ath_hal_reset(ah, sc->sc_opmode, chan, AH_TRUE, &status)) { if_printf(ifp, "%s: unable to reset " "channel %u (%u MHz, flags 0x%x), hal status %u\n", Modified: head/sys/dev/ath/if_ath_tx_ht.c ============================================================================== --- head/sys/dev/ath/if_ath_tx_ht.c Mon Feb 25 22:42:43 2013 (r247286) +++ head/sys/dev/ath/if_ath_tx_ht.c Mon Feb 25 22:45:02 2013 (r247287) @@ -499,20 +499,13 @@ ath_rateseries_setup(struct ath_softc *s series[i].Tries = rc[i].tries; /* - * XXX this isn't strictly correct - sc_txchainmask - * XXX isn't the currently active chainmask; - * XXX it's the interface chainmask at startup. - * XXX It's overridden in the HAL rate scenario function - * XXX for now. - */ - /* * XXX TODO: When the NIC is capable of three stream TX, * transmit 1/2 stream rates on two streams. * * This reduces the power consumption of the NIC and * keeps it within the PCIe slot power limits. */ - series[i].ChSel = sc->sc_txchainmask; + series[i].ChSel = sc->sc_cur_txchainmask; if (flags & (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) series[i].RateFlags |= HAL_RATESERIES_RTS_CTS; @@ -542,6 +535,14 @@ ath_rateseries_setup(struct ath_softc *s ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) series[i].RateFlags |= HAL_RATESERIES_HALFGI; + /* + * XXX TODO: STBC if it's possible + */ + + /* + * XXX TODO: LDPC if it's possible + */ + series[i].Rate = rt->info[rc[i].rix].rateCode; series[i].RateIndex = rc[i].rix; series[i].tx_power_cap = 0x3f; /* XXX for now */