From owner-cvs-src-old@FreeBSD.ORG Sat Jul 2 11:15:27 2011 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 02B40106566B for ; Sat, 2 Jul 2011 11:15:27 +0000 (UTC) (envelope-from marius@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id CA3AE8FC1A for ; Sat, 2 Jul 2011 11:15:26 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.4/8.14.4) with ESMTP id p62BFQPb057664 for ; Sat, 2 Jul 2011 11:15:26 GMT (envelope-from marius@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.4/8.14.4/Submit) id p62BFQXD057663 for cvs-src-old@freebsd.org; Sat, 2 Jul 2011 11:15:26 GMT (envelope-from marius@repoman.freebsd.org) Message-Id: <201107021115.p62BFQXD057663@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to marius@repoman.freebsd.org using -f From: Marius Strobl Date: Sat, 2 Jul 2011 11:14:54 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: HEAD Subject: cvs commit: src/sys/boot/sparc64/loader main.c src/sys/sparc64/include cache.h cpu.h tlb.h src/sys/sparc64/sparc64 cache.c cheetah.c machdep.c mp_machdep.c pmap.c spitfire.c zeus.c X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 02 Jul 2011 11:15:27 -0000 marius 2011-07-02 11:14:54 UTC FreeBSD src repository Modified files: sys/boot/sparc64/loader main.c sys/sparc64/include cache.h cpu.h tlb.h sys/sparc64/sparc64 cache.c cheetah.c machdep.c mp_machdep.c pmap.c spitfire.c zeus.c Log: SVN rev 223719 on 2011-07-02 11:14:54Z by marius - For Cheetah- and Zeus-class CPUs don't flush all unlocked entries from the TLBs in order to get rid of the user mappings but instead traverse them an flush only the latter like we also do for the Spitfire-class. Also flushing the unlocked kernel entries can cause instant faults which when called from within cpu_switch() are handled with the scheduler lock held which in turn can cause timeouts on the acquisition of the lock by other CPUs. This was easily seen with a 16-core V890 but occasionally also happened with 2-way machines. While at it, move the SPARC64-V support code entirely to zeus.c. This causes a little bit of duplication but is less confusing than partially using Cheetah-class bits for these. - For SPARC64-V ensure that 4-Mbyte page entries are stored in the 1024- entry, 2-way set associative TLB. - In {d,i}tlb_get_data_sun4u() turn off the interrupts in order to ensure that ASI_{D,I}TLB_DATA_ACCESS_REG actually are read twice back-to-back. Tested by: Peter Jeremy (16-core US-IV), Michael Moll (2-way SPARC64-V) Revision Changes Path 1.53 +63 -25 src/sys/boot/sparc64/loader/main.c 1.19 +5 -4 src/sys/sparc64/include/cache.h 1.20 +1 -0 src/sys/sparc64/include/cpu.h 1.31 +14 -1 src/sys/sparc64/include/tlb.h 1.27 +3 -3 src/sys/sparc64/sparc64/cache.c 1.15 +79 -28 src/sys/sparc64/sparc64/cheetah.c 1.177 +3 -2 src/sys/sparc64/sparc64/machdep.c 1.70 +4 -2 src/sys/sparc64/sparc64/mp_machdep.c 1.217 +15 -7 src/sys/sparc64/sparc64/pmap.c 1.10 +18 -20 src/sys/sparc64/sparc64/spitfire.c 1.2 +107 -1 src/sys/sparc64/sparc64/zeus.c