From owner-p4-projects@FreeBSD.ORG Sun Jun 1 23:55:39 2008 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 631161065679; Sun, 1 Jun 2008 23:55:39 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 23C66106567E for ; Sun, 1 Jun 2008 23:55:39 +0000 (UTC) (envelope-from jb@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 017EE8FC0C for ; Sun, 1 Jun 2008 23:55:39 +0000 (UTC) (envelope-from jb@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id m51Ntdh0026588 for ; Sun, 1 Jun 2008 23:55:39 GMT (envelope-from jb@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id m51NtcUe026586 for perforce@freebsd.org; Sun, 1 Jun 2008 23:55:38 GMT (envelope-from jb@freebsd.org) Date: Sun, 1 Jun 2008 23:55:38 GMT Message-Id: <200806012355.m51NtcUe026586@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to jb@freebsd.org using -f From: John Birrell To: Perforce Change Reviews Cc: Subject: PERFORCE change 142726 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 01 Jun 2008 23:55:39 -0000 http://perforce.freebsd.org/chv.cgi?CH=142726 Change 142726 by jb@freebsd3 on 2008/06/01 23:54:53 IF6 Affected files ... .. //depot/projects/dtrace6/src/MAINTAINERS#2 integrate .. //depot/projects/dtrace6/src/sys/dev/sym/sym_defs.h#2 integrate .. //depot/projects/dtrace6/src/sys/dev/sym/sym_fw.h#2 integrate .. //depot/projects/dtrace6/src/sys/dev/sym/sym_fw1.h#2 integrate .. //depot/projects/dtrace6/src/sys/dev/sym/sym_fw2.h#2 integrate .. //depot/projects/dtrace6/src/sys/dev/sym/sym_hipd.c#2 integrate Differences ... ==== //depot/projects/dtrace6/src/MAINTAINERS#2 (text+ko) ==== @@ -1,4 +1,4 @@ -$FreeBSD: src/MAINTAINERS,v 1.121.2.3 2006/07/09 22:06:27 markm Exp $ +$FreeBSD: src/MAINTAINERS,v 1.121.2.4 2008/05/31 22:32:51 peter Exp $ Please note that the content of this file is strictly advisory. No locks listed here are valid. The only strict review requirements @@ -73,7 +73,6 @@ ps gad I am working on a number of changes to this. Would like advance notice of major changes planned to it. cvs peter Heads-up appreciated, try not to break it. -ncurses peter Heads-up appreciated, try not to break it. nvi peter Try not to break it. libz peter Try not to break it. pppd/chat peter Try not to break it. ==== //depot/projects/dtrace6/src/sys/dev/sym/sym_defs.h#2 (text+ko) ==== @@ -55,7 +55,7 @@ * SUCH DAMAGE. */ -/* $FreeBSD: src/sys/dev/sym/sym_defs.h,v 1.11 2005/01/06 01:43:24 imp Exp $ */ +/* $FreeBSD: src/sys/dev/sym/sym_defs.h,v 1.11.2.1 2008/05/30 22:00:45 marius Exp $ */ #ifndef SYM_DEFS_H #define SYM_DEFS_H @@ -90,7 +90,7 @@ struct sym_pci_chip { u_short device_id; unsigned short revision_id; - char *name; + const char *name; u_char burst_max; /* log-base-2 of max burst */ u_char offset_max; u_char nr_divisor; ==== //depot/projects/dtrace6/src/sys/dev/sym/sym_fw.h#2 (text+ko) ==== @@ -55,7 +55,7 @@ * SUCH DAMAGE. */ -/* $FreeBSD: src/sys/dev/sym/sym_fw.h,v 1.5 2005/01/06 01:43:24 imp Exp $ */ +/* $FreeBSD: src/sys/dev/sym/sym_fw.h,v 1.5.2.1 2008/05/30 22:00:45 marius Exp $ */ #ifndef SYM_FW_H #define SYM_FW_H @@ -135,17 +135,17 @@ * Generic structure that defines a firmware. */ struct sym_fw { - char *name; /* Name we want to print out */ - u32 *a_base; /* Pointer to script A template */ + const char *name; /* Name we want to print out */ + const u32 *a_base;/* Pointer to script A template */ int a_size; /* Size of script A */ - struct sym_fwa_ofs + const struct sym_fwa_ofs *a_ofs; /* Useful offsets in script A */ - u32 *b_base; /* Pointer to script B template */ + const u32 *b_base;/* Pointer to script B template */ int b_size; /* Size of script B */ - struct sym_fwb_ofs + const struct sym_fwb_ofs *b_ofs; /* Useful offsets in script B */ /* Setup and patch methods for this firmware */ - void (*setup)(struct sym_hcb *, struct sym_fw *); + void (*setup)(struct sym_hcb *, const struct sym_fw *); void (*patch)(struct sym_hcb *); }; @@ -155,8 +155,8 @@ #define SYM_FW_ENTRY(fw, name) \ { \ name, \ - (u32 *) &fw##a_scr, sizeof(fw##a_scr), &fw##a_ofs, \ - (u32 *) &fw##b_scr, sizeof(fw##b_scr), &fw##b_ofs, \ + (const u32 *) &fw##a_scr, sizeof(fw##a_scr), &fw##a_ofs,\ + (const u32 *) &fw##b_scr, sizeof(fw##b_scr), &fw##b_ofs,\ fw##_setup, fw##_patch \ } ==== //depot/projects/dtrace6/src/sys/dev/sym/sym_fw1.h#2 (text+ko) ==== @@ -55,7 +55,7 @@ * SUCH DAMAGE. */ -/* $FreeBSD: src/sys/dev/sym/sym_fw1.h,v 1.7 2005/01/06 01:43:24 imp Exp $ */ +/* $FreeBSD: src/sys/dev/sym/sym_fw1.h,v 1.7.2.1 2008/05/30 22:00:45 marius Exp $ */ /* * Scripts for SYMBIOS-Processor @@ -219,7 +219,7 @@ u32 snoopend [ 2]; }; -static struct SYM_FWA_SCR SYM_FWA_SCR = { +static const struct SYM_FWA_SCR SYM_FWA_SCR = { /*--------------------------< START >----------------------------*/ { /* * Switch the LED on. @@ -1342,7 +1342,7 @@ }/*--------------------------<>----------------------------------*/ }; -static struct SYM_FWB_SCR SYM_FWB_SCR = { +static const struct SYM_FWB_SCR SYM_FWB_SCR = { /*-------------------------< NO_DATA >--------------------------*/ { SCR_JUMP, PADDR_B (data_ovrun), ==== //depot/projects/dtrace6/src/sys/dev/sym/sym_fw2.h#2 (text+ko) ==== @@ -55,7 +55,7 @@ * SUCH DAMAGE. */ -/* $FreeBSD: src/sys/dev/sym/sym_fw2.h,v 1.8 2005/01/06 01:43:24 imp Exp $ */ +/* $FreeBSD: src/sys/dev/sym/sym_fw2.h,v 1.8.2.1 2008/05/30 22:00:45 marius Exp $ */ /* * Scripts for SYMBIOS-Processor @@ -210,7 +210,7 @@ u32 snoopend [ 2]; }; -static struct SYM_FWA_SCR SYM_FWA_SCR = { +static const struct SYM_FWA_SCR SYM_FWA_SCR = { /*--------------------------< START >----------------------------*/ { /* * Switch the LED on. @@ -1195,7 +1195,7 @@ }/*-------------------------<>-----------------------------------*/ }; -static struct SYM_FWB_SCR SYM_FWB_SCR = { +static const struct SYM_FWB_SCR SYM_FWB_SCR = { /*--------------------------< START64 >--------------------------*/ { /* * SCRIPT entry point for the 895A, 896 and 1010. ==== //depot/projects/dtrace6/src/sys/dev/sym/sym_hipd.c#2 (text+ko) ==== @@ -1,5 +1,5 @@ /*- - * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010 + * Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010 * PCI-SCSI controllers. * * Copyright (C) 1999-2001 Gerard Roudier @@ -8,11 +8,11 @@ * 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895, * 53C810, 53C815, 53C825 and the 53C1510D is 53C8XX mode. * - * + * * This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver. * Copyright (C) 1998-1999 Gerard Roudier * - * The sym53c8xx driver is derived from the ncr53c8xx driver that had been + * The sym53c8xx driver is derived from the ncr53c8xx driver that had been * a port of the FreeBSD ncr driver to Linux-1.2.13. * * The original ncr driver has been written for 386bsd and FreeBSD by @@ -20,8 +20,8 @@ * Stefan Esser * Copyright (C) 1994 Wolfgang Stanglmeier * - * The initialisation code, and part of the code that addresses - * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM + * The initialisation code, and part of the code that addresses + * FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM * written by Justin T. Gibbs. * * Other major contributions: @@ -56,7 +56,7 @@ */ #include -__FBSDID("$FreeBSD: src/sys/dev/sym/sym_hipd.c,v 1.55.2.1 2007/08/19 10:51:03 se Exp $"); +__FBSDID("$FreeBSD: src/sys/dev/sym/sym_hipd.c,v 1.55.2.3 2008/05/30 22:00:45 marius Exp $"); #define SYM_DRIVER_NAME "sym-1.6.5-20000902" @@ -126,12 +126,12 @@ /* * IA32 architecture does not reorder STORES and prevents - * LOADS from passing STORES. It is called `program order' - * by Intel and allows device drivers to deal with memory - * ordering by only ensuring that the code is not reordered + * LOADS from passing STORES. It is called `program order' + * by Intel and allows device drivers to deal with memory + * ordering by only ensuring that the code is not reordered * by the compiler when ordering is required. - * Other architectures implement a weaker ordering that - * requires memory barriers (and also IO barriers when they + * Other architectures implement a weaker ordering that + * requires memory barriers (and also IO barriers when they * make sense) to be used. */ @@ -150,44 +150,6 @@ #endif /* - * Portable but silly implemented byte order primitives. - * We define the primitives we need, since FreeBSD doesn't - * seem to have them yet. - */ -#if BYTE_ORDER == BIG_ENDIAN - -#define __revb16(x) ( (((u16)(x) & (u16)0x00ffU) << 8) | \ - (((u16)(x) & (u16)0xff00U) >> 8) ) -#define __revb32(x) ( (((u32)(x) & 0x000000ffU) << 24) | \ - (((u32)(x) & 0x0000ff00U) << 8) | \ - (((u32)(x) & 0x00ff0000U) >> 8) | \ - (((u32)(x) & 0xff000000U) >> 24) ) - -#define __htole16(v) __revb16(v) -#define __htole32(v) __revb32(v) -#define __le16toh(v) __htole16(v) -#define __le32toh(v) __htole32(v) - -static __inline u16 _htole16(u16 v) { return __htole16(v); } -static __inline u32 _htole32(u32 v) { return __htole32(v); } -#define _le16toh _htole16 -#define _le32toh _htole32 - -#else /* LITTLE ENDIAN */ - -#define __htole16(v) (v) -#define __htole32(v) (v) -#define __le16toh(v) (v) -#define __le32toh(v) (v) - -#define _htole16(v) (v) -#define _htole32(v) (v) -#define _le16toh(v) (v) -#define _le32toh(v) (v) - -#endif /* BYTE_ORDER */ - -/* * A la VMS/CAM-3 queue management. */ @@ -202,12 +164,12 @@ static __inline struct sym_quehead *sym_que_first(struct sym_quehead *head) { - return (head->flink == head) ? 0 : head->flink; + return (head->flink == head) ? NULL : head->flink; } static __inline struct sym_quehead *sym_que_last(struct sym_quehead *head) { - return (head->blink == head) ? 0 : head->blink; + return (head->blink == head) ? NULL : head->blink; } static __inline void __sym_que_add(struct sym_quehead * new, @@ -250,7 +212,7 @@ } #define sym_que_entry(ptr, type, member) \ - ((type *)((char *)(ptr)-(unsigned int)(&((type *)0)->member))) + ((type *)((char *)(ptr)-(size_t)(&((type *)0)->member))) #define sym_insque(new, pos) __sym_que_add(new, pos, (pos)->flink) @@ -266,7 +228,7 @@ if (elem != head) __sym_que_del(head, elem->flink); else - elem = 0; + elem = NULL; return elem; } @@ -279,7 +241,7 @@ if (elem != head) __sym_que_del(elem->blink, head); else - elem = 0; + elem = NULL; return elem; } @@ -296,7 +258,7 @@ /* * Simple bitmap operations. - */ + */ #define sym_set_bit(p, n) (((u32 *)(p))[(n)>>5] |= (1<<((n)&0x1f))) #define sym_clr_bit(p, n) (((u32 *)(p))[(n)>>5] &= ~(1<<((n)&0x1f))) #define sym_is_bit(p, n) (((u32 *)(p))[(n)>>5] & (1<<((n)&0x1f))) @@ -340,7 +302,7 @@ #endif /* - * Asynchronous pre-scaler (ns). Shall be 40 for + * Asynchronous pre-scaler (ns). Shall be 40 for * the SCSI timings to be compliant. */ #define SYM_CONF_MIN_ASYNC (40) @@ -348,7 +310,7 @@ /* * Number of entries in the START and DONE queues. * - * We limit to 1 PAGE in order to succeed allocation of + * We limit to 1 PAGE in order to succeed allocation of * these queues. Each entry is 8 bytes long (2 DWORDS). */ #ifdef SYM_CONF_MAX_START @@ -405,18 +367,18 @@ /* * Simple power of two buddy-like allocator. * - * This simple code is not intended to be fast, but to + * This simple code is not intended to be fast, but to * provide power of 2 aligned memory allocations. - * Since the SCRIPTS processor only supplies 8 bit arithmetic, - * this allocator allows simple and fast address calculations - * from the SCRIPTS code. In addition, cache line alignment + * Since the SCRIPTS processor only supplies 8 bit arithmetic, + * this allocator allows simple and fast address calculations + * from the SCRIPTS code. In addition, cache line alignment * is guaranteed for power of 2 cache line size. * - * This allocator has been developped for the Linux sym53c8xx - * driver, since this O/S does not provide naturally aligned + * This allocator has been developped for the Linux sym53c8xx + * driver, since this O/S does not provide naturally aligned * allocations. - * It has the advantage of allowing the driver to use private - * pages of memory that will be useful if we ever need to deal + * It has the advantage of allowing the driver to use private + * pages of memory that will be useful if we ever need to deal * with IO MMUs for PCI. */ @@ -476,7 +438,7 @@ m_link_s *h = mp->h; if (size > MEMO_CLUSTER_SIZE) - return 0; + return NULL; while (size > s) { s <<= 1; @@ -488,7 +450,7 @@ if (s == MEMO_CLUSTER_SIZE) { h[j].next = (m_link_s *) M_GETP(); if (h[j].next) - h[j].next->next = 0; + h[j].next->next = NULL; break; } ++j; @@ -501,7 +463,7 @@ j -= 1; s >>= 1; h[j].next = (m_link_s *) (a+s); - h[j].next->next = 0; + h[j].next->next = NULL; } } #ifdef DEBUG @@ -588,7 +550,7 @@ * Default memory pool we donnot need to involve in DMA. */ /* - * With the `bus dma abstraction', we use a separate pool for + * With the `bus dma abstraction', we use a separate pool for * memory we donnot need to involve in DMA. */ static m_addr_t ___mp0_getp(m_pool_s *mp) @@ -640,11 +602,11 @@ * DMAable pools. */ /* - * With `bus dma abstraction', we use a separate pool per parent - * BUS handle. A reverse table (hashed) is maintained for virtual + * With `bus dma abstraction', we use a separate pool per parent + * BUS handle. A reverse table (hashed) is maintained for virtual * to BUS address translation. */ -static void getbaddrcb(void *arg, bus_dma_segment_t *segs, int nseg, int error) +static void getbaddrcb(void *arg, bus_dma_segment_t *segs, int nseg, int error) { bus_addr_t *baddr; baddr = (bus_addr_t *)arg; @@ -654,7 +616,7 @@ static m_addr_t ___dma_getp(m_pool_s *mp) { m_vtob_s *vbp; - void *vaddr = 0; + void *vaddr = NULL; bus_addr_t baddr = 0; vbp = __sym_calloc(&mp0, sizeof(*vbp), "VTOB"); @@ -718,7 +680,7 @@ static m_pool_s *___cre_dma_pool(bus_dma_tag_t dev_dmat) { - m_pool_s *mp = 0; + m_pool_s *mp = NULL; mp = __sym_calloc(&mp0, sizeof(*mp), "MPOOL"); if (mp) { @@ -740,7 +702,7 @@ } if (mp) __sym_mfree(&mp0, mp, sizeof(*mp), "MPOOL"); - return 0; + return NULL; } #ifdef MEMO_FREE_UNUSED @@ -761,7 +723,7 @@ static void *__sym_calloc_dma(bus_dma_tag_t dev_dmat, int size, char *name) { struct m_pool *mp; - void *m = 0; + void *m = NULL; /* Lock */ mp = ___get_dma_pool(dev_dmat); @@ -778,7 +740,7 @@ return m; } -static void +static void __sym_mfree_dma(bus_dma_tag_t dev_dmat, void *m, int size, char *name) { struct m_pool *mp; @@ -798,7 +760,7 @@ { m_pool_s *mp; int hc = VTOB_HASH_CODE(m); - m_vtob_s *vp = 0; + m_vtob_s *vp = NULL; m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK; /* Lock */ @@ -817,7 +779,7 @@ /* * Verbs for DMAable memory handling. - * The _uvptv_ macro avoids a nasty warning about pointer to volatile + * The _uvptv_ macro avoids a nasty warning about pointer to volatile * being discarded. */ #define _uvptv_(p) ((void *)((vm_offset_t)(p))) @@ -852,7 +814,7 @@ /* * Return a string for SCSI BUS mode. */ -static char *sym_scsi_bus_mode(int mode) +static const char *sym_scsi_bus_mode(int mode) { switch(mode) { case SMODE_HVD: return "HVD"; @@ -866,7 +828,7 @@ * Some poor and bogus sync table that refers to Tekram NVRAM layout. */ #ifdef SYM_CONF_NVRAM_SUPPORT -static u_char Tekram_sync[16] = +static const u_char Tekram_sync[16] = {25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10}; #endif @@ -900,7 +862,7 @@ #endif /* - * Some provision for a possible big endian mode supported by + * Some provision for a possible big endian mode supported by * Symbios chips (never seen, by the way). * For now, this stuff does not deserve any comments. :) */ @@ -910,20 +872,14 @@ /* * Some provision for support for BIG ENDIAN CPU. - * Btw, FreeBSD does not seem to be ready yet for big endian. */ -#if BYTE_ORDER == BIG_ENDIAN -#define cpu_to_scr(dw) _htole32(dw) -#define scr_to_cpu(dw) _le32toh(dw) -#else -#define cpu_to_scr(dw) (dw) -#define scr_to_cpu(dw) (dw) -#endif +#define cpu_to_scr(dw) htole32(dw) +#define scr_to_cpu(dw) le32toh(dw) /* * Access to the chip IO registers and on-chip RAM. - * We use the `bus space' interface under FreeBSD-4 and + * We use the `bus space' interface under FreeBSD-4 and * later kernel versions. */ @@ -1050,7 +1006,7 @@ #define NS_PPR (3) /* - * A CCB hashed table is used to retrieve CCB address + * A CCB hashed table is used to retrieve CCB address * from DSA value. */ #define CCB_HASH_SHIFT 8 @@ -1074,12 +1030,12 @@ /* * Device quirks. - * Some devices, for example the CHEETAH 2 LVD, disconnects without + * Some devices, for example the CHEETAH 2 LVD, disconnects without * saving the DATA POINTER then reselects and terminates the IO. - * On reselection, the automatic RESTORE DATA POINTER makes the + * On reselection, the automatic RESTORE DATA POINTER makes the * CURRENT DATA POINTER not point at the end of the IO. * This behaviour just breaks our calculation of the residual. - * For now, we just force an AUTO SAVE on disconnection and will + * For now, we just force an AUTO SAVE on disconnection and will * fix that in a further driver version. */ #define SYM_QUIRK_AUTOSAVE 1 @@ -1135,23 +1091,23 @@ * Global TCB HEADER. * * Due to lack of indirect addressing on earlier NCR chips, - * this substructure is copied from the TCB to a global + * this substructure is copied from the TCB to a global * address after selection. - * For SYMBIOS chips that support LOAD/STORE this copy is + * For SYMBIOS chips that support LOAD/STORE this copy is * not needed and thus not performed. */ struct sym_tcbh { /* * Scripts bus addresses of LUN table accessed from scripts. - * LUN #0 is a special case, since multi-lun devices are rare, - * and we we want to speed-up the general case and not waste + * LUN #0 is a special case, since multi-lun devices are rare, + * and we we want to speed-up the general case and not waste * resources. */ u32 luntbl_sa; /* bus address of this table */ u32 lun0_sa; /* bus address of LCB #0 */ /* * Actual SYNC/WIDE IO registers value for this target. - * 'sval', 'wval' and 'uval' are read from SCRIPTS and + * 'sval', 'wval' and 'uval' are read from SCRIPTS and * so have alignment constraints. */ /*0*/ u_char uval; /* -> SCNTL4 register */ @@ -1185,14 +1141,14 @@ #endif /* - * Bitmap that tells about LUNs that succeeded at least + * Bitmap that tells about LUNs that succeeded at least * 1 IO and therefore assumed to be a real device. * Avoid useless allocation of the LCB structure. */ u32 lun_map[(SYM_CONF_MAX_LUN+31)/32]; /* - * Bitmap that tells about LUNs that haven't yet an LCB + * Bitmap that tells about LUNs that haven't yet an LCB * allocated (not discovered or LCB allocation failed). */ u32 busy0_map[(SYM_CONF_MAX_LUN+31)/32]; @@ -1225,22 +1181,22 @@ * Global LCB HEADER. * * Due to lack of indirect addressing on earlier NCR chips, - * this substructure is copied from the LCB to a global + * this substructure is copied from the LCB to a global * address after selection. - * For SYMBIOS chips that support LOAD/STORE this copy is + * For SYMBIOS chips that support LOAD/STORE this copy is * not needed and thus not performed. */ struct sym_lcbh { /* * SCRIPTS address jumped by SCRIPTS on reselection. - * For not probed logical units, this address points to - * SCRIPTS that deal with bad LU handling (must be at + * For not probed logical units, this address points to + * SCRIPTS that deal with bad LU handling (must be at * offset zero of the LCB for that reason). */ /*0*/ u32 resel_sa; /* - * Task (bus address of a CCB) read from SCRIPTS that points + * Task (bus address of a CCB) read from SCRIPTS that points * to the unique ITL nexus allowed to be disconnected. */ u32 itl_task_sa; @@ -1262,8 +1218,8 @@ /*0*/ struct sym_lcbh head; /* - * Task table read from SCRIPTS that contains pointers to - * ITLQ nexuses. The bus address read from SCRIPTS is + * Task table read from SCRIPTS that contains pointers to + * ITLQ nexuses. The bus address read from SCRIPTS is * inside the header. */ u32 *itlq_tbl; /* Kernel virtual address */ @@ -1295,7 +1251,7 @@ /* * Action from SCRIPTS on a task. - * Is part of the CCB, but is also used separately to plug + * Is part of the CCB, but is also used separately to plug * error handling action to perform from SCRIPTS. */ struct sym_actscr { @@ -1306,8 +1262,8 @@ /* * Phase mismatch context. * - * It is part of the CCB and is used as parameters for the - * DATA pointer. We need two contexts to handle correctly the + * It is part of the CCB and is used as parameters for the + * DATA pointer. We need two contexts to handle correctly the * SAVED DATA POINTER. */ struct sym_pmc { @@ -1317,8 +1273,8 @@ /* * LUN control block lookup. - * We use a direct pointer for LUN #0, and a table of - * pointers which is only allocated for devices that support + * We use a direct pointer for LUN #0, and a table of + * pointers which is only allocated for devices that support * LUN(s) > 0. */ #if SYM_CONF_MAX_LUN <= 1 @@ -1331,8 +1287,8 @@ /* * Status are used by the host and the script processor. * - * The last four bytes (status[4]) are copied to the - * scratchb register (declared as scr0..scr3) just after the + * The last four bytes (status[4]) are copied to the + * scratchb register (declared as scr0..scr3) just after the * select/reselect, and copied back just after disconnecting. * Inside the script the XX_REG are used. */ @@ -1374,10 +1330,10 @@ * Global CCB HEADER. * * Due to lack of indirect addressing on earlier NCR chips, - * this substructure is copied from the ccb to a global - * address after selection (or reselection) and copied back + * this substructure is copied from the ccb to a global + * address after selection (or reselection) and copied back * before disconnect. - * For SYMBIOS chips that support LOAD/STORE this copy is + * For SYMBIOS chips that support LOAD/STORE this copy is * not needed and thus not performed. */ @@ -1389,7 +1345,7 @@ /* * SCRIPTS jump address that deal with data pointers. - * 'savep' points to the position in the script responsible + * 'savep' points to the position in the script responsible * for the actual transfer of data. * It's written on reception of a SAVE_DATA_POINTER message. */ @@ -1406,8 +1362,8 @@ /* * Data Structure Block * - * During execution of a ccb by the script processor, the - * DSA (data structure address) register points to this + * During execution of a ccb by the script processor, the + * DSA (data structure address) register points to this * substructure of the ccb. */ struct sym_dsb { @@ -1420,7 +1376,7 @@ /* * Phase mismatch contexts. * We need two to handle correctly the SAVED DATA POINTER. - * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic + * MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic * for address calculation from SCRIPTS. */ struct sym_pmc pm0; @@ -1443,7 +1399,7 @@ */ struct sym_ccb { /* - * This is the data structure which is pointed by the DSA + * This is the data structure which is pointed by the DSA * register when it is executed by the script processor. * It must be the first entry. */ @@ -1469,7 +1425,7 @@ /* * Message areas. * We prepare a message to be sent after selection. - * We may use a second one if the command is rescheduled + * We may use a second one if the command is rescheduled * due to CHECK_CONDITION or COMMAND TERMINATED. * Contents are IDENTIFY and SIMPLE_TAG. * While negotiating sync or wide transfer, @@ -1520,8 +1476,8 @@ struct sym_hcb { /* * Global headers. - * Due to poorness of addressing capabilities, earlier - * chips (810, 815, 825) copy part of the data structures + * Due to poorness of addressing capabilities, earlier + * chips (810, 815, 825) copy part of the data structures * (CCB, TCB and LCB) in fixed areas. */ #ifdef SYM_CONF_GENERIC_SUPPORT @@ -1530,14 +1486,14 @@ struct sym_lcbh lcb_head; #endif /* - * Idle task and invalid task actions and + * Idle task and invalid task actions and * their bus addresses. */ struct sym_actscr idletask, notask, bad_itl, bad_itlq; vm_offset_t idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba; /* - * Dummy lun table to protect us against target + * Dummy lun table to protect us against target * returning bad lun number on reselection. */ u32 *badluntbl; /* Table physical address */ @@ -1550,7 +1506,7 @@ /* * Bit 32-63 of the on-chip RAM bus address in LE format. - * The START_RAM64 script loads the MMRS and MMWS from this + * The START_RAM64 script loads the MMRS and MMWS from this * field. */ u32 scr_ram_seg; @@ -1559,12 +1515,10 @@ * Chip and controller indentification. */ device_t device; - int unit; - char inst_name[8]; /* * Initial value of some IO register bits. - * These values are assumed to have been set by BIOS, and may + * These values are assumed to have been set by BIOS, and may * be used to probe adapter implementation differences. */ u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4, @@ -1572,11 +1526,11 @@ sv_stest1; /* - * Actual initial value of IO register bits used by the - * driver. They are loaded at initialisation according to + * Actual initial value of IO register bits used by the + * driver. They are loaded at initialisation according to * features that are to be enabled/disabled. */ - u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4, + u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4, rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4; /* @@ -1589,7 +1543,7 @@ #endif /* - * Target control block bus address array used by the SCRIPT + * Target control block bus address array used by the SCRIPT * on reselection. */ u32 *targtbl; @@ -1614,12 +1568,12 @@ /* * Bus stuff. * - * My understanding of PCI is that all agents must share the + * My understanding of PCI is that all agents must share the * same addressing range and model. - * But some hardware architecture guys provide complex and + * But some hardware architecture guys provide complex and * brain-deaded stuff that makes shit. - * This driver only support PCI compliant implementations and - * deals with part of the BUS stuff complexity only to fit O/S + * This driver only support PCI compliant implementations and + * deals with part of the BUS stuff complexity only to fit O/S * requirements. */ bus_space_handle_t io_bsh; @@ -1635,23 +1589,18 @@ bus_dma_tag_t bus_dmat; /* DMA tag from parent BUS */ bus_dma_tag_t data_dmat; /* DMA tag for user data */ /* - * Virtual and physical bus addresses of the chip. + * BUS addresses of the chip */ - vm_offset_t mmio_va; /* MMIO kernel virtual address */ - vm_offset_t mmio_pa; /* MMIO CPU physical address */ vm_offset_t mmio_ba; /* MMIO BUS address */ int mmio_ws; /* MMIO Window size */ - vm_offset_t ram_va; /* RAM kernel virtual address */ - vm_offset_t ram_pa; /* RAM CPU physical address */ vm_offset_t ram_ba; /* RAM BUS address */ int ram_ws; /* RAM window size */ - u32 io_port; /* IO port address */ /* * SCRIPTS virtual and physical bus addresses. * 'script' is loaded in the on-chip RAM if present. - * 'scripth' stays in main memory for all chips except the + * 'scripth' stays in main memory for all chips except the * 53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM. */ u_char *scripta0; /* Copies of script and scripth */ @@ -1663,14 +1612,14 @@ u_short scriptb_sz; /* Actual size of script B */ /* - * Bus addresses, setup and patch methods for + * Bus addresses, setup and patch methods for * the selected firmware. */ struct sym_fwa_ba fwa_bas; /* Useful SCRIPTA bus addresses */ struct sym_fwb_ba fwb_bas; /* Useful SCRIPTB bus addresses */ - void (*fw_setup)(hcb_p np, struct sym_fw *fw); + void (*fw_setup)(hcb_p np, const struct sym_fw *fw); void (*fw_patch)(hcb_p np); - char *fw_name; + const char *fw_name; /* * General controller parameters and configuration. @@ -1693,7 +1642,7 @@ u32 pciclk_khz; /* Estimated PCI clock in KHz */ /* * Start queue management. - * It is filled up by the host processor and accessed by the + * It is filled up by the host processor and accessed by the * SCRIPTS processor in order to start SCSI commands. */ volatile /* Prevent code optimizations */ @@ -1713,7 +1662,7 @@ /* * Miscellaneous buffers accessed by the scripts-processor. - * They shall be DWORD aligned, because they may be read or + * They shall be DWORD aligned, because they may be read or * written with a script command. */ u_char msgout[8]; /* Buffer for MESSAGE OUT */ @@ -1738,7 +1687,7 @@ /* * During error handling and/or recovery, - * active CCBs that are to be completed with + * active CCBs that are to be completed with * error or requeued are moved from the busy_ccbq * to the comp_ccbq prior to completion. */ @@ -1752,12 +1701,12 @@ /* * IMMEDIATE ARBITRATION (IARB) control. * - * We keep track in 'last_cp' of the last CCB that has been - * queued to the SCRIPTS processor and clear 'last_cp' when - * this CCB completes. If last_cp is not zero at the moment - * we queue a new CCB, we set a flag in 'last_cp' that is + * We keep track in 'last_cp' of the last CCB that has been + * queued to the SCRIPTS processor and clear 'last_cp' when + * this CCB completes. If last_cp is not zero at the moment + * we queue a new CCB, we set a flag in 'last_cp' that is * used by the SCRIPTS as a hint for setting IARB. - * We donnot set more than 'iarb_max' consecutive hints for + * We donnot set more than 'iarb_max' consecutive hints for * IARB in order to leave devices a chance to reselect. * By the way, any non zero value of 'iarb_max' is unfair. :) */ @@ -1769,7 +1718,7 @@ /* * Command abort handling. - * We need to synchronize tightly with the SCRIPTS + * We need to synchronize tightly with the SCRIPTS * processor in order to handle things correctly. */ u_char abrt_msg[4]; /* Message to send buffer */ @@ -1783,9 +1732,9 @@ /* * Return the name of the controller. */ -static __inline char *sym_name(hcb_p np) +static __inline const char *sym_name(hcb_p np) { - return np->inst_name; + return device_get_nameunit(np->device); } /*--------------------------------------------------------------------------*/ @@ -1813,10 +1762,10 @@ #define SYM_FWA_SCR sym_fw1a_scr #define SYM_FWB_SCR sym_fw1b_scr #include -struct sym_fwa_ofs sym_fw1a_ofs = { +static const struct sym_fwa_ofs sym_fw1a_ofs = { SYM_GEN_FW_A(struct SYM_FWA_SCR) }; -struct sym_fwb_ofs sym_fw1b_ofs = { +static const struct sym_fwb_ofs sym_fw1b_ofs = { SYM_GEN_FW_B(struct SYM_FWB_SCR) }; #undef SYM_FWA_SCR @@ -1829,10 +1778,10 @@ #define SYM_FWA_SCR sym_fw2a_scr #define SYM_FWB_SCR sym_fw2b_scr #include -struct sym_fwa_ofs sym_fw2a_ofs = { +static const struct sym_fwa_ofs sym_fw2a_ofs = { SYM_GEN_FW_A(struct SYM_FWA_SCR) }; -struct sym_fwb_ofs sym_fw2b_ofs = { +static const struct sym_fwb_ofs sym_fw2b_ofs = { SYM_GEN_FW_B(struct SYM_FWB_SCR) SYM_GEN_B(struct SYM_FWB_SCR, start64) SYM_GEN_B(struct SYM_FWB_SCR, pm_handle) @@ -1935,7 +1884,7 @@ } /* - * Remove a couple of work-arounds specific to C1010 if + * Remove a couple of work-arounds specific to C1010 if * they are not desirable. See `sym_fw2.h' for more details. */ if (!(np->device_id == PCI_ID_LSI53C1010_2 && @@ -1955,10 +1904,10 @@ * These ones are loaded by the SCRIPTS processor. */ scriptb0->pm0_data_addr[0] = - cpu_to_scr(np->scripta_ba + + cpu_to_scr(np->scripta_ba + offsetof(struct sym_fw2a_scr, pm0_data)); scriptb0->pm1_data_addr[0] = - cpu_to_scr(np->scripta_ba + + cpu_to_scr(np->scripta_ba + offsetof(struct sym_fw2a_scr, pm1_data)); } @@ -1983,18 +1932,18 @@ * Setup useful script bus addresses. * To be done for all firmwares. */ -static void -sym_fw_setup_bus_addresses(hcb_p np, struct sym_fw *fw) +static void +sym_fw_setup_bus_addresses(hcb_p np, const struct sym_fw *fw) { u32 *pa; >>> TRUNCATED FOR MAIL (1000 lines) <<<