From nobody Fri Jul 7 19:25:04 2023 X-Original-To: dev-commits-src-branches@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4QyNdZ54Hwz4lW4m; Fri, 7 Jul 2023 19:25:06 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4QyNdY0YhCz3qJ4; Fri, 7 Jul 2023 19:25:05 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1688757905; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=V9jWKoLs0DE6gXLcMDb7DbnU0H9rDwloxRAtVEORcoQ=; b=XQb/6wUHyRK8iuSusdm5JhJHl7UMY63Z6z3Gd0IDVomdFA/+4PLCk+WTcAYbuP6ShPvRf2 RODGcaaBcqRFAP8d9pRcPzv57vWaDL/d1rnbBPThQggg25G4qj5ZS5kuRiBTdvagPPKJ9M U8hak+cuI6ZApKsUyqau8r5jdAl+EKxFZA8K3E/NB3ms13F1P3B95u181qh+LCqnIpytsV V7NkAjjHlLmsqmMUa0yKjw8XRyLwZTLg2oQSKdw4Qa4BpKkljsJX9tQiPzhPVbXh9bvkGN BrfWlT5Ps76PUqLGLuJB6JuJrEF6m5190mxYGfWuocj5YJhlDBYJFTvJFQ+Zvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1688757905; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=V9jWKoLs0DE6gXLcMDb7DbnU0H9rDwloxRAtVEORcoQ=; b=wbJ7clD6eTP+VnmBv/bddt/jKwJByHyBGVjaR0PjWmE6V34NfF8aFYKdmaQdNVrS55/fQ2 UjkHFgMYPFDpuEq1KpV2I7T0pcmtVtnKc6CjdCqe9orE2RdVwubOf5MBoyrKvwxDAdSTrX Mp8k1JDIPiIWizycp3J0A4f63cSwgPNF4WJzLSowOnLYDmftV6Nsw/ocR+tfFAIVvKXbwj 0oBP8YjwnlT2nixmdFC46eJuYeFycuKHW/Ct5AIqcOeQv3ylEWDZUyX8VmtBzH/+i+DQG8 IWitLpq4lAbVNau98ktCutR6CB9kz3FCR2BksiEiXfFduS7yNHNShYBnWW/wxA== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1688757905; a=rsa-sha256; cv=none; b=PRA/33M76dCRoe8F5xUGQRwJS38/KPIniW6i1t10p5XLXW/2tJSplYpgn927wJAGvFd7TQ mW0qhTZqorBCQjv0bit637YHj52yL7+9D42XnoU8nkk7o1/zkFszWetIuKiEUfYrPmERv/ k1Oepwe61HVi/d/eORwzSiQ6gsrA+Fp8WyQ7mqQLTk2zriq7TniY3IbXD5bPbLqDoU1hMF Ws2/nXSDDE8lvfV9r/thTWS949xw3eOcTrK672/WIdbRMeVtiG7aljA9mW9DvSL0uRHpK0 XEs0ZOWxcsYdj3SJj48ZmT3QYoU8vlDm9YGzfKwxZTVT9rWWrdV0CQPVI6ehsA== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4QyNdX6k07zrDZ; Fri, 7 Jul 2023 19:25:04 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 367JP4Il062306; Fri, 7 Jul 2023 19:25:04 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 367JP4bQ062305; Fri, 7 Jul 2023 19:25:04 GMT (envelope-from git) Date: Fri, 7 Jul 2023 19:25:04 GMT Message-Id: <202307071925.367JP4bQ062305@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Mitchell Horne Subject: git: eb08efb821fd - stable/13 - amdtemp: Fix missing 49 degree offset on current EPYC CPUs List-Id: Commits to the stable branches of the FreeBSD src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-branches List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-branches@freebsd.org X-BeenThere: dev-commits-src-branches@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mhorne X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: eb08efb821fd7d3ee599d65c704fb88c28c57842 Auto-Submitted: auto-generated X-ThisMailContainsUnwantedMimeParts: N The branch stable/13 has been updated by mhorne: URL: https://cgit.FreeBSD.org/src/commit/?id=eb08efb821fd7d3ee599d65c704fb88c28c57842 commit eb08efb821fd7d3ee599d65c704fb88c28c57842 Author: Val Packett AuthorDate: 2023-06-17 16:29:53 +0000 Commit: Mitchell Horne CommitDate: 2023-07-07 19:20:50 +0000 amdtemp: Fix missing 49 degree offset on current EPYC CPUs On an EPYC 7313P, the temperature reported by amdtemp was off, because the offset was not applied. Turns out it needs to be applied with one more condition: https://lkml.org/lkml/2023/4/13/1095 Reviewed by: mhorne Tested by: mike.jakubik@gmail.com MFC after: 1 week Sponsored by: https://www.patreon.com/valpackett Pull Request: https://github.com/freebsd/freebsd-src/pull/754 (cherry picked from commit c1cbabe8ae5702a1e54d62401fe3b58a84fcb3e4) --- sys/dev/amdtemp/amdtemp.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/sys/dev/amdtemp/amdtemp.c b/sys/dev/amdtemp/amdtemp.c index 493f619c0427..238ae572d096 100644 --- a/sys/dev/amdtemp/amdtemp.c +++ b/sys/dev/amdtemp/amdtemp.c @@ -165,6 +165,12 @@ static const struct amdtemp_product { */ #define AMDTEMP_17H_CUR_TMP 0x59800 #define AMDTEMP_17H_CUR_TMP_RANGE_SEL (1u << 19) +/* + * Bits 16-17, when set, mean that CUR_TMP is read-write. When it is, the + * 49 degree offset should apply as well. This was revealed in a Linux + * patch from an AMD employee. + */ +#define AMDTEMP_17H_CUR_TMP_TJ_SEL ((1u << 17) | (1u << 16)) /* * The following register set was discovered experimentally by Ondrej Čerman * and collaborators, but is not (yet) documented in a PPR/OSRR (other than @@ -732,7 +738,8 @@ amdtemp_decode_fam17h_tctl(int32_t sc_offset, uint32_t val) { bool minus49; - minus49 = ((val & AMDTEMP_17H_CUR_TMP_RANGE_SEL) != 0); + minus49 = ((val & AMDTEMP_17H_CUR_TMP_RANGE_SEL) != 0) + || ((val & AMDTEMP_17H_CUR_TMP_TJ_SEL) == AMDTEMP_17H_CUR_TMP_TJ_SEL); return (amdtemp_decode_fam10h_to_17h(sc_offset, val >> AMDTEMP_REPTMP10H_CURTMP_SHIFT, minus49)); }