From owner-svn-src-projects@FreeBSD.ORG Fri Nov 6 21:53:39 2009 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 023F5106566B; Fri, 6 Nov 2009 21:53:39 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id E63018FC15; Fri, 6 Nov 2009 21:53:38 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id nA6Lrcvx029504; Fri, 6 Nov 2009 21:53:38 GMT (envelope-from gonzo@svn.freebsd.org) Received: (from gonzo@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id nA6Lrcrq029502; Fri, 6 Nov 2009 21:53:38 GMT (envelope-from gonzo@svn.freebsd.org) Message-Id: <200911062153.nA6Lrcrq029502@svn.freebsd.org> From: Oleksandr Tymoshenko Date: Fri, 6 Nov 2009 21:53:38 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r199005 - projects/mips/sys/mips/atheros X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 06 Nov 2009 21:53:39 -0000 Author: gonzo Date: Fri Nov 6 21:53:38 2009 New Revision: 199005 URL: http://svn.freebsd.org/changeset/base/199005 Log: - Fix: Wrong register is used for initial value reading Modified: projects/mips/sys/mips/atheros/if_arge.c Modified: projects/mips/sys/mips/atheros/if_arge.c ============================================================================== --- projects/mips/sys/mips/atheros/if_arge.c Fri Nov 6 20:33:53 2009 (r199004) +++ projects/mips/sys/mips/atheros/if_arge.c Fri Nov 6 21:53:38 2009 (r199005) @@ -620,7 +620,7 @@ arge_link_task(void *arg, int pending) rx_filtmask); /* set PLL registers */ - sec_cfg = ATH_READ_REG(AR71XX_PLL_CPU_CONFIG); + sec_cfg = ATH_READ_REG(AR71XX_PLL_SEC_CONFIG); sec_cfg &= ~(3 << sc->arge_pll_reg_shift); sec_cfg |= (2 << sc->arge_pll_reg_shift);