From owner-svn-src-head@FreeBSD.ORG Tue Apr 30 05:32:08 2013 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.FreeBSD.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 7F43A9E9; Tue, 30 Apr 2013 05:32:08 +0000 (UTC) (envelope-from np@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id 627F91C0F; Tue, 30 Apr 2013 05:32:08 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.6/8.14.6) with ESMTP id r3U5W8nE072115; Tue, 30 Apr 2013 05:32:08 GMT (envelope-from np@svn.freebsd.org) Received: (from np@localhost) by svn.freebsd.org (8.14.6/8.14.5/Submit) id r3U5W7DT072106; Tue, 30 Apr 2013 05:32:07 GMT (envelope-from np@svn.freebsd.org) Message-Id: <201304300532.r3U5W7DT072106@svn.freebsd.org> From: Navdeep Parhar Date: Tue, 30 Apr 2013 05:32:07 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r250090 - in head/sys/dev/cxgbe: . common firmware X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Apr 2013 05:32:08 -0000 Author: np Date: Tue Apr 30 05:32:07 2013 New Revision: 250090 URL: http://svnweb.freebsd.org/changeset/base/250090 Log: cxgbe(4): Some updates to shared code. Obtained from: Chelsio MFC after: 1 week Modified: head/sys/dev/cxgbe/common/common.h head/sys/dev/cxgbe/common/t4_hw.c head/sys/dev/cxgbe/firmware/t4fw_interface.h head/sys/dev/cxgbe/osdep.h Modified: head/sys/dev/cxgbe/common/common.h ============================================================================== --- head/sys/dev/cxgbe/common/common.h Tue Apr 30 05:30:09 2013 (r250089) +++ head/sys/dev/cxgbe/common/common.h Tue Apr 30 05:32:07 2013 (r250090) @@ -424,7 +424,7 @@ int t4_read_flash(struct adapter *adapte int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size); int t4_load_boot(struct adapter *adap, u8 *boot_data, unsigned int boot_addr, unsigned int size); -unsigned int t4_flash_cfg_addr(struct adapter *adapter); +int t4_flash_cfg_addr(struct adapter *adapter); int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); int t4_get_fw_version(struct adapter *adapter, u32 *vers); int t4_get_tp_version(struct adapter *adapter, u32 *vers); Modified: head/sys/dev/cxgbe/common/t4_hw.c ============================================================================== --- head/sys/dev/cxgbe/common/t4_hw.c Tue Apr 30 05:30:09 2013 (r250089) +++ head/sys/dev/cxgbe/common/t4_hw.c Tue Apr 30 05:32:07 2013 (r250090) @@ -176,9 +176,7 @@ static void t4_report_fw_error(struct ad u32 pcie_fw; pcie_fw = t4_read_reg(adap, A_PCIE_FW); - if (!(pcie_fw & F_PCIE_FW_ERR)) - CH_ERR(adap, "Firmware error report called with no error\n"); - else + if (pcie_fw & F_PCIE_FW_ERR) CH_ERR(adap, "Firmware reports adapter error: %s\n", reason[G_PCIE_FW_EVAL(pcie_fw)]); } @@ -512,6 +510,7 @@ struct t4_vpd_hdr { #define VPD_BASE_OLD 0 #define VPD_LEN 1024 #define VPD_INFO_FLD_HDR_SIZE 3 +#define CHELSIO_VPD_UNIQUE_ID 0x82 /** * t4_seeprom_read - read a serial EEPROM location @@ -676,7 +675,7 @@ static int get_vpd_params(struct adapter * it at 0. */ ret = t4_seeprom_read(adapter, VPD_BASE, (u32 *)(vpd)); - addr = *vpd == 0x82 ? VPD_BASE : VPD_BASE_OLD; + addr = *vpd == CHELSIO_VPD_UNIQUE_ID ? VPD_BASE : VPD_BASE_OLD; for (i = 0; i < sizeof(vpd); i += 4) { ret = t4_seeprom_read(adapter, addr + i, (u32 *)(vpd + i)); @@ -714,8 +713,10 @@ static int get_vpd_params(struct adapter i = vpd[sn - VPD_INFO_FLD_HDR_SIZE + 2]; memcpy(p->sn, vpd + sn, min(i, SERNUM_LEN)); strstrip(p->sn); + i = vpd[pn - VPD_INFO_FLD_HDR_SIZE + 2]; memcpy(p->pn, vpd + pn, min(i, PN_LEN)); strstrip((char *)p->pn); + i = vpd[na - VPD_INFO_FLD_HDR_SIZE + 2]; memcpy(p->na, vpd + na, min(i, MACADDR_LEN)); strstrip((char *)p->na); @@ -1034,14 +1035,19 @@ static int t4_flash_erase_sectors(struct * @adapter: the adapter * * Return the address within the flash where the Firmware Configuration - * File is stored. + * File is stored, or an error if the device FLASH is too small to contain + * a Firmware Configuration File. */ -unsigned int t4_flash_cfg_addr(struct adapter *adapter) +int t4_flash_cfg_addr(struct adapter *adapter) { - if (adapter->params.sf_size == 0x100000) - return FLASH_FPGA_CFG_START; - else - return FLASH_CFG_START; + /* + * If the device FLASH isn't large enough to hold a Firmware + * Configuration File, return an error. + */ + if (adapter->params.sf_size < FLASH_CFG_START + FLASH_CFG_MAX_SIZE) + return -ENOSPC; + + return FLASH_CFG_START; } /** @@ -1054,12 +1060,16 @@ unsigned int t4_flash_cfg_addr(struct ad */ int t4_load_cfg(struct adapter *adap, const u8 *cfg_data, unsigned int size) { - int ret, i, n; + int ret, i, n, cfg_addr; unsigned int addr; unsigned int flash_cfg_start_sec; unsigned int sf_sec_size = adap->params.sf_size / adap->params.sf_nsec; - addr = t4_flash_cfg_addr(adap); + cfg_addr = t4_flash_cfg_addr(adap); + if (cfg_addr < 0) + return cfg_addr; + + addr = cfg_addr; flash_cfg_start_sec = addr / SF_SEC_SIZE; if (size > FLASH_CFG_MAX_SIZE) { @@ -1839,7 +1849,8 @@ void t4_ulprx_read_la(struct adapter *ad } #define ADVERT_MASK (FW_PORT_CAP_SPEED_100M | FW_PORT_CAP_SPEED_1G |\ - FW_PORT_CAP_SPEED_10G | FW_PORT_CAP_ANEG) + FW_PORT_CAP_SPEED_10G | FW_PORT_CAP_SPEED_40G | \ + FW_PORT_CAP_SPEED_100G | FW_PORT_CAP_ANEG) /** * t4_link_start - apply link configuration to MAC/PHY @@ -2406,8 +2417,13 @@ static void mem_intr_handler(struct adap addr = EDC_REG(A_EDC_INT_CAUSE, idx); cnt_addr = EDC_REG(A_EDC_ECC_STATUS, idx); } else { - addr = A_MC_INT_CAUSE; - cnt_addr = A_MC_ECC_STATUS; + if (is_t4(adapter)) { + addr = A_MC_INT_CAUSE; + cnt_addr = A_MC_ECC_STATUS; + } else { + addr = A_MC_P_INT_CAUSE; + cnt_addr = A_MC_P_ECC_STATUS; + } } v = t4_read_reg(adapter, addr) & MEM_INT_MASK; @@ -2514,12 +2530,19 @@ static void xgmac_intr_handler(struct ad static void pl_intr_handler(struct adapter *adap) { static struct intr_info pl_intr_info[] = { - { F_FATALPERR, "T4 fatal parity error", -1, 1 }, + { F_FATALPERR, "Fatal parity error", -1, 1 }, { F_PERRVFID, "PL VFID_MAP parity error", -1, 1 }, { 0 } }; - if (t4_handle_intr_status(adap, A_PL_PL_INT_CAUSE, pl_intr_info)) + static struct intr_info t5_pl_intr_info[] = { + { F_PL_BUSPERR, "PL bus parity error", -1, 1 }, + { F_FATALPERR, "Fatal parity error", -1, 1 }, + { 0 } + }; + + if (t4_handle_intr_status(adap, A_PL_PL_INT_CAUSE, + is_t4(adap) ? pl_intr_info : t5_pl_intr_info)) t4_fatal_err(adap); } @@ -2652,7 +2675,6 @@ void t4_intr_clear(struct adapter *adapt A_PCIE_CORE_UTL_SYSTEM_BUS_AGENT_STATUS, A_PCIE_CORE_UTL_PCI_EXPRESS_PORT_STATUS, A_PCIE_NONFAT_ERR, A_PCIE_INT_CAUSE, - A_MC_INT_CAUSE, A_MA_INT_WRAP_STATUS, A_MA_PARITY_ERROR_STATUS, A_MA_INT_CAUSE, A_EDC_INT_CAUSE, EDC_REG(A_EDC_INT_CAUSE, 1), A_CIM_HOST_INT_CAUSE, A_CIM_HOST_UPACC_INT_CAUSE, @@ -2672,6 +2694,9 @@ void t4_intr_clear(struct adapter *adapt for (i = 0; i < ARRAY_SIZE(cause_reg); ++i) t4_write_reg(adapter, cause_reg[i], 0xffffffff); + t4_write_reg(adapter, is_t4(adapter) ? A_MC_INT_CAUSE : + A_MC_P_INT_CAUSE, 0xffffffff); + t4_write_reg(adapter, A_PL_INT_CAUSE, GLBL_INTR_MASK); (void) t4_read_reg(adapter, A_PL_INT_CAUSE); /* flush */ } @@ -4666,8 +4691,8 @@ int t4_query_params(struct adapter *adap V_FW_PARAMS_CMD_VFN(vf)); c.retval_len16 = htonl(FW_LEN16(c)); - for (i = 0; i < nparams; i++, p += 2) - *p = htonl(*params++); + for (i = 0; i < nparams; i++, p += 2, params++) + *p = htonl(*params); ret = t4_wr_mbox(adap, mbox, &c, sizeof(c), &c); if (ret == 0) @@ -4706,8 +4731,10 @@ int t4_set_params(struct adapter *adap, c.retval_len16 = htonl(FW_LEN16(c)); while (nparams--) { - *p++ = htonl(*params++); - *p++ = htonl(*val++); + *p++ = htonl(*params); + params++; + *p++ = htonl(*val); + val++; } return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); @@ -5299,6 +5326,8 @@ int t4_handle_fw_rpl(struct adapter *ada speed = SPEED_1000; else if (stat & V_FW_PORT_CMD_LSPEED(FW_PORT_CAP_SPEED_10G)) speed = SPEED_10000; + else if (stat & V_FW_PORT_CMD_LSPEED(FW_PORT_CAP_SPEED_40G)) + speed = SPEED_40000; for_each_port(adap, i) { pi = adap2pinfo(adap, i); @@ -5312,6 +5341,7 @@ int t4_handle_fw_rpl(struct adapter *ada lc->link_ok = link_ok; lc->speed = speed; lc->fc = fc; + lc->supported = ntohs(p->u.info.pcap); t4_os_link_changed(adap, i, link_ok); } if (mod != pi->mod_type) { Modified: head/sys/dev/cxgbe/firmware/t4fw_interface.h ============================================================================== --- head/sys/dev/cxgbe/firmware/t4fw_interface.h Tue Apr 30 05:30:09 2013 (r250089) +++ head/sys/dev/cxgbe/firmware/t4fw_interface.h Tue Apr 30 05:32:07 2013 (r250090) @@ -80,6 +80,7 @@ enum fw_retval { ********************************/ enum fw_wr_opcodes { + FW_FRAG_WR = 0x1d, FW_FILTER_WR = 0x02, FW_ULPTX_WR = 0x04, FW_TP_WR = 0x05, @@ -203,6 +204,24 @@ struct fw_wr_hdr { #define V_FW_WR_LEN16(x) ((x) << S_FW_WR_LEN16) #define G_FW_WR_LEN16(x) (((x) >> S_FW_WR_LEN16) & M_FW_WR_LEN16) +struct fw_frag_wr { + __be32 op_to_fragoff16; + __be32 flowid_len16; + __be64 r4; +}; + +#define S_FW_FRAG_WR_EOF 15 +#define M_FW_FRAG_WR_EOF 0x1 +#define V_FW_FRAG_WR_EOF(x) ((x) << S_FW_FRAG_WR_EOF) +#define G_FW_FRAG_WR_EOF(x) (((x) >> S_FW_FRAG_WR_EOF) & M_FW_FRAG_WR_EOF) +#define F_FW_FRAG_WR_EOF V_FW_FRAG_WR_EOF(1U) + +#define S_FW_FRAG_WR_FRAGOFF16 8 +#define M_FW_FRAG_WR_FRAGOFF16 0x7f +#define V_FW_FRAG_WR_FRAGOFF16(x) ((x) << S_FW_FRAG_WR_FRAGOFF16) +#define G_FW_FRAG_WR_FRAGOFF16(x) \ + (((x) >> S_FW_FRAG_WR_FRAGOFF16) & M_FW_FRAG_WR_FRAGOFF16) + /* valid filter configurations for compressed tuple * Encodings: TPL - Compressed TUPLE for filter in addition to 4-tuple * FR - FRAGMENT, FC - FCoE, MT - MPS MATCH TYPE, M - MPS MATCH, @@ -2996,6 +3015,9 @@ enum fw_ldst_addrspc { FW_LDST_ADDRSPC_FUNC_I2C = 0x002A, /* legacy */ FW_LDST_ADDRSPC_LE = 0x0030, FW_LDST_ADDRSPC_I2C = 0x0038, + FW_LDST_ADDRSPC_PCIE_CFGS = 0x0040, + FW_LDST_ADDRSPC_PCIE_DBG = 0x0041, + FW_LDST_ADDRSPC_PCIE_PHY = 0x0042, }; /* @@ -3482,13 +3504,20 @@ enum fw_params_param_dev { FW_PARAMS_PARAM_DEV_INTFVER_ISCSIPDU = 0x08, FW_PARAMS_PARAM_DEV_INTFVER_ISCSI = 0x09, FW_PARAMS_PARAM_DEV_INTFVER_FCOE = 0x0A, - FW_PARAMS_PARAM_DEV_FWREV = 0x0B, - FW_PARAMS_PARAM_DEV_TPREV = 0x0C, - FW_PARAMS_PARAM_DEV_CF = 0x0D, - FW_PARAMS_PARAM_DEV_BYPASS = 0x0E, - FW_PARAMS_PARAM_DEV_PHYFW = 0x0F, - FW_PARAMS_PARAM_DEV_LOAD = 0x10, - FW_PARAMS_PARAM_DEV_DIAG = 0x11, + FW_PARAMS_PARAM_DEV_FWREV = 0x0B, + FW_PARAMS_PARAM_DEV_TPREV = 0x0C, + FW_PARAMS_PARAM_DEV_CF = 0x0D, + FW_PARAMS_PARAM_DEV_BYPASS = 0x0E, + FW_PARAMS_PARAM_DEV_PHYFW = 0x0F, + FW_PARAMS_PARAM_DEV_LOAD = 0x10, + FW_PARAMS_PARAM_DEV_DIAG = 0x11, + FW_PARAMS_PARAM_DEV_UCLK = 0x12, /* uP clock in khz */ + FW_PARAMS_PARAM_DEV_MAXORDIRD_QP = 0x13, /* max supported QP IRD/ORD + */ + FW_PARAMS_PARAM_DEV_MAXIRD_ADAPTER= 0x14,/* max supported ADAPTER IRD + */ + FW_PARAMS_PARAM_DEV_INTFVER_FCOEPDU = 0x15, + FW_PARAMS_PARAM_DEV_MCINIT = 0x16, }; /* @@ -5860,6 +5889,9 @@ enum fw_port_type { FW_PORT_TYPE_SFP = 9, /* No, 1, Yes, No, No, No, 10G */ FW_PORT_TYPE_BP_AP = 10, /* No, 1, No, No, Yes, Yes, 10G, BP ANGE */ FW_PORT_TYPE_BP4_AP = 11, /* No, 4, No, No, Yes, Yes, 10G, BP ANGE */ + FW_PORT_TYPE_QSFP_10G = 12, /* No, 1, Yes, No, No, No, 10G */ + FW_PORT_TYPE_QSFP = 14, /* No, 4, Yes, No, No, No, 40G */ + FW_PORT_TYPE_BP40_BA = 15, /* No, 4, No, No, Yes, Yes, 40G/10G/1G, BP ANGE */ FW_PORT_TYPE_NONE = M_FW_PORT_CMD_PTYPE }; @@ -6783,6 +6815,7 @@ enum fw_devlog_level { */ enum fw_devlog_facility { FW_DEVLOG_FACILITY_CORE = 0x00, + FW_DEVLOG_FACILITY_CF = 0x01, FW_DEVLOG_FACILITY_SCHED = 0x02, FW_DEVLOG_FACILITY_TIMER = 0x04, FW_DEVLOG_FACILITY_RES = 0x06, Modified: head/sys/dev/cxgbe/osdep.h ============================================================================== --- head/sys/dev/cxgbe/osdep.h Tue Apr 30 05:30:09 2013 (r250089) +++ head/sys/dev/cxgbe/osdep.h Tue Apr 30 05:32:07 2013 (r250090) @@ -109,6 +109,7 @@ typedef boolean_t bool; #define SPEED_100 100 #define SPEED_1000 1000 #define SPEED_10000 10000 +#define SPEED_40000 40000 #define DUPLEX_HALF 0 #define DUPLEX_FULL 1 #define AUTONEG_DISABLE 0